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drm/i915: Kill has_dp_encoder from pipe_config
Use the new output_types bitmask instead of has_dp_encoder. To make it less oainlful provide a small helper (intel_crtc_has_dp_encoder()) to do the bitsy stuff. v2: Rebase Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1466621833-5054-7-git-send-email-ville.syrjala@linux.intel.com
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@ -834,7 +834,7 @@ static void ddi_dotclock_get(struct intel_crtc_state *pipe_config)
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if (pipe_config->has_pch_encoder)
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dotclock = intel_dotclock_calculate(pipe_config->port_clock,
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&pipe_config->fdi_m_n);
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else if (pipe_config->has_dp_encoder)
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else if (intel_crtc_has_dp_encoder(pipe_config))
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dotclock = intel_dotclock_calculate(pipe_config->port_clock,
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&pipe_config->dp_m_n);
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else if (pipe_config->has_hdmi_sink && pipe_config->pipe_bpp == 36)
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@ -2211,7 +2211,6 @@ void intel_ddi_get_config(struct intel_encoder *encoder,
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break;
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case TRANS_DDI_MODE_SELECT_DP_SST:
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case TRANS_DDI_MODE_SELECT_DP_MST:
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pipe_config->has_dp_encoder = true;
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pipe_config->lane_count =
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((temp & DDI_PORT_WIDTH_MASK) >> DDI_PORT_WIDTH_SHIFT) + 1;
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intel_dp_get_m_n(intel_crtc, pipe_config);
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@ -4109,7 +4109,7 @@ static void ironlake_pch_enable(struct drm_crtc *crtc)
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intel_fdi_normal_train(crtc);
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/* For PCH DP, enable TRANS_DP_CTL */
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if (HAS_PCH_CPT(dev) && intel_crtc->config->has_dp_encoder) {
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if (HAS_PCH_CPT(dev) && intel_crtc_has_dp_encoder(intel_crtc->config)) {
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const struct drm_display_mode *adjusted_mode =
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&intel_crtc->config->base.adjusted_mode;
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u32 bpc = (I915_READ(PIPECONF(pipe)) & PIPECONF_BPC_MASK) >> 5;
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@ -4735,7 +4735,7 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc)
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if (intel_crtc->config->has_pch_encoder)
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intel_prepare_shared_dpll(intel_crtc);
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if (intel_crtc->config->has_dp_encoder)
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if (intel_crtc_has_dp_encoder(intel_crtc->config))
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intel_dp_set_m_n(intel_crtc, M1_N1);
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intel_set_pipe_timings(intel_crtc);
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@ -4826,7 +4826,7 @@ static void haswell_crtc_enable(struct drm_crtc *crtc)
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if (intel_crtc->config->shared_dpll)
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intel_enable_shared_dpll(intel_crtc);
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if (intel_crtc->config->has_dp_encoder)
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if (intel_crtc_has_dp_encoder(intel_crtc->config))
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intel_dp_set_m_n(intel_crtc, M1_N1);
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if (!intel_crtc->config->has_dsi_encoder)
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@ -6129,7 +6129,7 @@ static void valleyview_crtc_enable(struct drm_crtc *crtc)
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if (WARN_ON(intel_crtc->active))
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return;
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if (intel_crtc->config->has_dp_encoder)
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if (intel_crtc_has_dp_encoder(intel_crtc->config))
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intel_dp_set_m_n(intel_crtc, M1_N1);
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intel_set_pipe_timings(intel_crtc);
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@ -6202,7 +6202,7 @@ static void i9xx_crtc_enable(struct drm_crtc *crtc)
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i9xx_set_pll_dividers(intel_crtc);
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if (intel_crtc->config->has_dp_encoder)
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if (intel_crtc_has_dp_encoder(intel_crtc->config))
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intel_dp_set_m_n(intel_crtc, M1_N1);
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intel_set_pipe_timings(intel_crtc);
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@ -7373,7 +7373,7 @@ static void vlv_prepare_pll(struct intel_crtc *crtc,
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vlv_dpio_write(dev_priv, pipe, VLV_PLL_DW10(pipe),
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0x00d0000f);
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if (pipe_config->has_dp_encoder) {
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if (intel_crtc_has_dp_encoder(pipe_config)) {
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/* Use SSC source */
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if (pipe == PIPE_A)
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vlv_dpio_write(dev_priv, pipe, VLV_PLL_DW5(pipe),
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@ -7590,7 +7590,7 @@ static void i9xx_compute_dpll(struct intel_crtc *crtc,
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intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI))
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dpll |= DPLL_SDVO_HIGH_SPEED;
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if (crtc_state->has_dp_encoder)
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if (intel_crtc_has_dp_encoder(crtc_state))
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dpll |= DPLL_SDVO_HIGH_SPEED;
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/* compute bitmask from p1 value */
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@ -8935,7 +8935,7 @@ static void ironlake_compute_dpll(struct intel_crtc *intel_crtc,
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intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI))
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dpll |= DPLL_SDVO_HIGH_SPEED;
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if (crtc_state->has_dp_encoder)
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if (intel_crtc_has_dp_encoder(crtc_state))
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dpll |= DPLL_SDVO_HIGH_SPEED;
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/* compute bitmask from p1 value */
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@ -12238,14 +12238,14 @@ static void intel_dump_pipe_config(struct intel_crtc *crtc,
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pipe_config->fdi_m_n.link_m, pipe_config->fdi_m_n.link_n,
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pipe_config->fdi_m_n.tu);
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DRM_DEBUG_KMS("dp: %i, lanes: %i, gmch_m: %u, gmch_n: %u, link_m: %u, link_n: %u, tu: %u\n",
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pipe_config->has_dp_encoder,
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intel_crtc_has_dp_encoder(pipe_config),
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pipe_config->lane_count,
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pipe_config->dp_m_n.gmch_m, pipe_config->dp_m_n.gmch_n,
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pipe_config->dp_m_n.link_m, pipe_config->dp_m_n.link_n,
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pipe_config->dp_m_n.tu);
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DRM_DEBUG_KMS("dp: %i, lanes: %i, gmch_m2: %u, gmch_n2: %u, link_m2: %u, link_n2: %u, tu2: %u\n",
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pipe_config->has_dp_encoder,
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intel_crtc_has_dp_encoder(pipe_config),
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pipe_config->lane_count,
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pipe_config->dp_m2_n2.gmch_m,
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pipe_config->dp_m2_n2.gmch_n,
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@ -12773,7 +12773,6 @@ intel_pipe_config_compare(struct drm_device *dev,
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PIPE_CONF_CHECK_I(fdi_lanes);
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PIPE_CONF_CHECK_M_N(fdi_m_n);
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PIPE_CONF_CHECK_I(has_dp_encoder);
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PIPE_CONF_CHECK_I(lane_count);
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PIPE_CONF_CHECK_X(lane_lat_optim_mask);
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@ -1501,7 +1501,6 @@ intel_dp_compute_config(struct intel_encoder *encoder,
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if (HAS_PCH_SPLIT(dev) && !HAS_DDI(dev) && port != PORT_A)
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pipe_config->has_pch_encoder = true;
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pipe_config->has_dp_encoder = true;
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pipe_config->has_drrs = false;
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pipe_config->has_audio = intel_dp->has_audio && port != PORT_A;
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@ -2442,8 +2441,6 @@ static void intel_dp_get_config(struct intel_encoder *encoder,
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!IS_CHERRYVIEW(dev) && tmp & DP_COLOR_RANGE_16_235)
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pipe_config->limited_color_range = true;
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pipe_config->has_dp_encoder = true;
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pipe_config->lane_count =
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((tmp & DP_PORT_WIDTH_MASK) >> DP_PORT_WIDTH_SHIFT) + 1;
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@ -47,7 +47,6 @@ static bool intel_dp_mst_compute_config(struct intel_encoder *encoder,
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pipe_config->dp_encoder_is_mst = true;
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pipe_config->has_pch_encoder = false;
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pipe_config->has_dp_encoder = true;
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bpp = 24;
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/*
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* for MST we always configure max link bw - the spec doesn't
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@ -246,8 +245,6 @@ static void intel_dp_mst_enc_get_config(struct intel_encoder *encoder,
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enum transcoder cpu_transcoder = pipe_config->cpu_transcoder;
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u32 temp, flags = 0;
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pipe_config->has_dp_encoder = true;
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temp = I915_READ(TRANS_DDI_FUNC_CTL(cpu_transcoder));
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if (temp & TRANS_DDI_PHSYNC)
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flags |= DRM_MODE_FLAG_PHSYNC;
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@ -522,10 +522,6 @@ struct intel_crtc_state {
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*/
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bool limited_color_range;
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/* DP has a bunch of special case unfortunately, so mark the pipe
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* accordingly. */
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bool has_dp_encoder;
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/* DSI has special cases */
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bool has_dsi_encoder;
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@ -1198,6 +1194,14 @@ intel_crtc_has_type(const struct intel_crtc_state *crtc_state,
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{
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return crtc_state->output_types & (1 << type);
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}
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static inline bool
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intel_crtc_has_dp_encoder(const struct intel_crtc_state *crtc_state)
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{
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return crtc_state->output_types &
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((1 << INTEL_OUTPUT_DISPLAYPORT) |
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(1 << INTEL_OUTPUT_DP_MST) |
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(1 << INTEL_OUTPUT_EDP));
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}
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static inline void
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intel_wait_for_vblank(struct drm_device *dev, int pipe)
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{
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