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x86, irq: Refine mp_register_ioapic() to prepare for IOAPIC hotplug
Refine mp_register_ioapic() to prepare for IOAPIC hotplug by: 1) change return value from void to int. 2) check for gsi range conflicts 3) check for IOAPIC physical address conflicts 4) enhance the way to allocate IOAPIC index Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com> Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Cc: Tony Luck <tony.luck@intel.com> Cc: Joerg Roedel <joro@8bytes.org> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Rafael J. Wysocki <rjw@rjwysocki.net> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Randy Dunlap <rdunlap@infradead.org> Cc: Yinghai Lu <yinghai@kernel.org> Cc: Borislav Petkov <bp@alien8.de> Cc: Grant Likely <grant.likely@linaro.org> Cc: Prarit Bhargava <prarit@redhat.com> Link: http://lkml.kernel.org/r/1414387308-27148-14-git-send-email-jiang.liu@linux.intel.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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@ -188,8 +188,8 @@ extern int mp_find_ioapic_pin(int ioapic, u32 gsi);
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extern u32 mp_pin_to_gsi(int ioapic, int pin);
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extern int mp_map_gsi_to_irq(u32 gsi, unsigned int flags);
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extern void mp_unmap_irq(int irq);
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extern void mp_register_ioapic(int id, u32 address, u32 gsi_base,
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struct ioapic_domain_cfg *cfg);
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extern int mp_register_ioapic(int id, u32 address, u32 gsi_base,
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struct ioapic_domain_cfg *cfg);
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extern int mp_irqdomain_map(struct irq_domain *domain, unsigned int virq,
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irq_hw_number_t hwirq);
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extern void mp_irqdomain_unmap(struct irq_domain *domain, unsigned int virq);
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@ -3840,20 +3840,6 @@ int mp_find_ioapic_pin(int ioapic, u32 gsi)
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return gsi - gsi_cfg->gsi_base;
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}
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static int bad_ioapic(unsigned long address)
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{
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if (nr_ioapics >= MAX_IO_APICS) {
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pr_warn("WARNING: Max # of I/O APICs (%d) exceeded (found %d), skipping\n",
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MAX_IO_APICS, nr_ioapics);
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return 1;
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}
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if (!address) {
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pr_warn("WARNING: Bogus (zero) I/O APIC address found in table, skipping!\n");
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return 1;
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}
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return 0;
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}
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static int bad_ioapic_register(int idx)
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{
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union IO_APIC_reg_00 reg_00;
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@ -3873,29 +3859,51 @@ static int bad_ioapic_register(int idx)
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return 0;
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}
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void mp_register_ioapic(int id, u32 address, u32 gsi_base,
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struct ioapic_domain_cfg *cfg)
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static int find_free_ioapic_entry(void)
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{
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return nr_ioapics;
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}
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/**
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* mp_register_ioapic - Register an IOAPIC device
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* @id: hardware IOAPIC ID
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* @address: physical address of IOAPIC register area
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* @gsi_base: base of GSI associated with the IOAPIC
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* @cfg: configuration information for the IOAPIC
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*/
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int mp_register_ioapic(int id, u32 address, u32 gsi_base,
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struct ioapic_domain_cfg *cfg)
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{
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int idx = 0;
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int entries;
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struct mp_ioapic_gsi *gsi_cfg;
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int idx, ioapic, entries;
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u32 gsi_end;
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if (bad_ioapic(address))
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return;
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if (!address) {
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pr_warn("Bogus (zero) I/O APIC address found, skipping!\n");
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return -EINVAL;
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}
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for_each_ioapic(ioapic)
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if (ioapics[ioapic].mp_config.apicaddr == address) {
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pr_warn("address 0x%x conflicts with IOAPIC%d\n",
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address, ioapic);
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return -EEXIST;
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}
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idx = nr_ioapics;
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idx = find_free_ioapic_entry();
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if (idx >= MAX_IO_APICS) {
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pr_warn("Max # of I/O APICs (%d) exceeded (found %d), skipping\n",
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MAX_IO_APICS, idx);
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return -ENOSPC;
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}
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ioapics[idx].mp_config.type = MP_IOAPIC;
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ioapics[idx].mp_config.flags = MPC_APIC_USABLE;
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ioapics[idx].mp_config.apicaddr = address;
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ioapics[idx].irqdomain = NULL;
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ioapics[idx].irqdomain_cfg = *cfg;
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set_fixmap_nocache(FIX_IO_APIC_BASE_0 + idx, address);
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if (bad_ioapic_register(idx)) {
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clear_fixmap(FIX_IO_APIC_BASE_0 + idx);
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return;
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return -ENODEV;
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}
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ioapics[idx].mp_config.apicid = io_apic_unique_id(idx, id);
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@ -3906,24 +3914,41 @@ void mp_register_ioapic(int id, u32 address, u32 gsi_base,
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* and to prevent reprogramming of IOAPIC pins (PCI GSIs).
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*/
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entries = io_apic_get_redir_entries(idx);
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gsi_end = gsi_base + entries - 1;
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for_each_ioapic(ioapic) {
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gsi_cfg = mp_ioapic_gsi_routing(ioapic);
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if ((gsi_base >= gsi_cfg->gsi_base &&
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gsi_base <= gsi_cfg->gsi_end) ||
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(gsi_end >= gsi_cfg->gsi_base &&
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gsi_end <= gsi_cfg->gsi_end)) {
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pr_warn("GSI range [%u-%u] for new IOAPIC conflicts with GSI[%u-%u]\n",
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gsi_base, gsi_end,
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gsi_cfg->gsi_base, gsi_cfg->gsi_end);
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clear_fixmap(FIX_IO_APIC_BASE_0 + idx);
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return -ENOSPC;
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}
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}
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gsi_cfg = mp_ioapic_gsi_routing(idx);
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gsi_cfg->gsi_base = gsi_base;
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gsi_cfg->gsi_end = gsi_base + entries - 1;
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gsi_cfg->gsi_end = gsi_end;
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/*
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* The number of IO-APIC IRQ registers (== #pins):
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*/
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ioapics[idx].nr_registers = entries;
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ioapics[idx].irqdomain = NULL;
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ioapics[idx].irqdomain_cfg = *cfg;
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if (gsi_cfg->gsi_end >= gsi_top)
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gsi_top = gsi_cfg->gsi_end + 1;
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if (nr_ioapics <= idx)
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nr_ioapics = idx + 1;
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/* Set nr_registers to mark entry present */
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ioapics[idx].nr_registers = entries;
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pr_info("IOAPIC[%d]: apic_id %d, version %d, address 0x%x, GSI %d-%d\n",
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idx, mpc_ioapic_id(idx),
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mpc_ioapic_ver(idx), mpc_ioapic_addr(idx),
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gsi_cfg->gsi_base, gsi_cfg->gsi_end);
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nr_ioapics++;
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return 0;
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}
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int mp_irqdomain_map(struct irq_domain *domain, unsigned int virq,
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