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ARM: shmobile: r8a7790: add USB3.0 clocks to device tree
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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@ -754,17 +754,17 @@ mstp3_clks: mstp3_clks@e615013c {
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reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>;
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clocks = <&hp_clk>, <&cp_clk>, <&mmc1_clk>, <&sd3_clk>,
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<&sd2_clk>, <&cpg_clocks R8A7790_CLK_SD1>, <&cpg_clocks R8A7790_CLK_SD0>, <&mmc0_clk>,
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<&hp_clk>, <&hp_clk>, <&rclk_clk>;
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<&hp_clk>, <&hp_clk>, <&mp_clk>, <&rclk_clk>;
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#clock-cells = <1>;
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renesas,clock-indices = <
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R8A7790_CLK_IIC2 R8A7790_CLK_TPU0 R8A7790_CLK_MMCIF1 R8A7790_CLK_SDHI3
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R8A7790_CLK_SDHI2 R8A7790_CLK_SDHI1 R8A7790_CLK_SDHI0 R8A7790_CLK_MMCIF0
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R8A7790_CLK_IIC0 R8A7790_CLK_IIC1 R8A7790_CLK_CMT1
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R8A7790_CLK_IIC0 R8A7790_CLK_IIC1 R8A7790_CLK_SSUSB R8A7790_CLK_CMT1
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>;
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clock-output-names =
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"iic2", "tpu0", "mmcif1", "sdhi3",
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"sdhi2", "sdhi1", "sdhi0", "mmcif0",
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"iic0", "iic1", "cmt1";
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"iic0", "iic1", "ssusb", "cmt1";
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};
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mstp5_clks: mstp5_clks@e6150144 {
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compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
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