mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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arm64: dts: fsl: pico-pi: Add a device tree for the PICO-PI-IMX8M
TechNexion PICO-PI-IMX8M-DEV evaluation and development kit based on NXP i.MX8M Quad applications processor. Datasheet can be found at: https://s3.us-east-2.amazonaws.com/technexion/datasheets/picopiimx8m.pdf The current level of support yields a working console and is able to boot userspace from NFS or init ramdisk. Additional subsystems that are active : - Ethernet - USB Cc: Daniel Baluta <daniel.baluta@nxp.com> Signed-off-by: Richard Hu <richard.hu@technexion.com> Signed-off-by: Andra Danciu <andradanciu1997@gmail.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Richard Hu
Shawn Guo
parent
adc898e3d1
commit
356c27227b
@ -24,6 +24,7 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-rdb.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mm-evk.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mq-evk.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mq-librem5-devkit.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mq-pico-pi.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mq-zii-ultra-rmb3.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mq-zii-ultra-zest.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8qxp-ai_ml.dtb
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413
arch/arm64/boot/dts/freescale/imx8mq-pico-pi.dts
Normal file
413
arch/arm64/boot/dts/freescale/imx8mq-pico-pi.dts
Normal file
@ -0,0 +1,413 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2018 Wandboard, Org.
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* Copyright 2017 NXP
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*
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* Author: Richard Hu <hakahu@gmail.com>
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*/
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/dts-v1/;
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#include "imx8mq.dtsi"
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/ {
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model = "TechNexion PICO-PI-8M";
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compatible = "technexion,pico-pi-imx8m", "fsl,imx8mq";
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chosen {
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stdout-path = &uart1;
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};
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pmic_osc: clock-pmic {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <32768>;
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clock-output-names = "pmic_osc";
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};
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reg_usb_otg_vbus: regulator-usb-otg-vbus {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_otg_vbus>;
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compatible = "regulator-fixed";
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regulator-name = "usb_otg_vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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gpio = <&gpio3 14 GPIO_ACTIVE_LOW>;
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};
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};
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&fec1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_fec1 &pinctrl_enet_3v3>;
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phy-mode = "rgmii-id";
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phy-handle = <ðphy0>;
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fsl,magic-packet;
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status = "okay";
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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ethphy0: ethernet-phy@1 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <1>;
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};
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};
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};
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&i2c1 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c1>;
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status = "okay";
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pmic: pmic@4b {
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reg = <0x4b>;
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compatible = "rohm,bd71837";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pmic>;
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clocks = <&pmic_osc>;
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clock-names = "osc";
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clock-output-names = "pmic_clk";
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interrupt-parent = <&gpio1>;
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interrupts = <3 GPIO_ACTIVE_LOW>;
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interrupt-names = "irq";
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regulators {
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buck1: BUCK1 {
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regulator-name = "buck1";
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regulator-min-microvolt = <700000>;
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regulator-max-microvolt = <1300000>;
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regulator-boot-on;
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regulator-ramp-delay = <1250>;
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rohm,dvs-run-voltage = <900000>;
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rohm,dvs-idle-voltage = <850000>;
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rohm,dvs-suspend-voltage = <800000>;
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};
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buck2: BUCK2 {
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regulator-name = "buck2";
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regulator-min-microvolt = <700000>;
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regulator-max-microvolt = <1300000>;
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regulator-boot-on;
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regulator-ramp-delay = <1250>;
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rohm,dvs-run-voltage = <1000000>;
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rohm,dvs-idle-voltage = <900000>;
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};
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buck3: BUCK3 {
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regulator-name = "buck3";
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regulator-min-microvolt = <700000>;
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regulator-max-microvolt = <1300000>;
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regulator-boot-on;
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rohm,dvs-run-voltage = <1000000>;
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};
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buck4: BUCK4 {
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regulator-name = "buck4";
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regulator-min-microvolt = <700000>;
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regulator-max-microvolt = <1300000>;
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regulator-boot-on;
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rohm,dvs-run-voltage = <1000000>;
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};
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buck5: BUCK5 {
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regulator-name = "buck5";
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regulator-min-microvolt = <700000>;
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regulator-max-microvolt = <1350000>;
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regulator-boot-on;
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};
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buck6: BUCK6 {
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regulator-name = "buck6";
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regulator-min-microvolt = <3000000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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};
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buck7: BUCK7 {
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regulator-name = "buck7";
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regulator-min-microvolt = <1605000>;
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regulator-max-microvolt = <1995000>;
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regulator-boot-on;
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};
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buck8: BUCK8 {
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regulator-name = "buck8";
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <1400000>;
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regulator-boot-on;
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};
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ldo1: LDO1 {
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regulator-name = "ldo1";
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regulator-min-microvolt = <3000000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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ldo2: LDO2 {
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regulator-name = "ldo2";
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <900000>;
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regulator-boot-on;
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regulator-always-on;
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};
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ldo3: LDO3 {
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regulator-name = "ldo3";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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};
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ldo4: LDO4 {
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regulator-name = "ldo4";
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <1800000>;
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regulator-boot-on;
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};
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ldo5: LDO5 {
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regulator-name = "ldo5";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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};
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ldo6: LDO6 {
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regulator-name = "ldo6";
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <1800000>;
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regulator-boot-on;
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};
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ldo7: LDO7 {
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regulator-name = "ldo7";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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};
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};
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};
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};
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&i2c2 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c2>;
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status = "okay";
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};
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&uart1 { /* console */
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1>;
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status = "okay";
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};
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&usdhc1 {
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pinctrl-names = "default", "state_100mhz", "state_200mhz";
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pinctrl-0 = <&pinctrl_usdhc1>;
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pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
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pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
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bus-width = <8>;
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non-removable;
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status = "okay";
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};
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&usdhc2 {
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pinctrl-names = "default", "state_100mhz", "state_200mhz";
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pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
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pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
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pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
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bus-width = <4>;
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cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
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status = "okay";
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};
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&usb3_phy0 {
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status = "okay";
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};
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&usb3_phy1 {
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status = "okay";
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};
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&usb_dwc3_1 {
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dr_mode = "host";
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status = "okay";
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};
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&wdog1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_wdog>;
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fsl,ext-reset-output;
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status = "okay";
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};
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&iomuxc {
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pinctrl_enet_3v3: enet3v3grp {
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fsl,pins = <
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MX8MQ_IOMUXC_GPIO1_IO00_GPIO1_IO0 0x19
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>;
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};
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pinctrl_fec1: fec1grp {
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fsl,pins = <
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MX8MQ_IOMUXC_ENET_MDC_ENET1_MDC 0x3
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MX8MQ_IOMUXC_ENET_MDIO_ENET1_MDIO 0x23
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MX8MQ_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f
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MX8MQ_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f
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MX8MQ_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f
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MX8MQ_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f
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MX8MQ_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91
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MX8MQ_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91
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MX8MQ_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91
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MX8MQ_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91
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MX8MQ_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f
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MX8MQ_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91
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MX8MQ_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91
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MX8MQ_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f
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MX8MQ_IOMUXC_GPIO1_IO09_GPIO1_IO9 0x19
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>;
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};
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pinctrl_i2c1: i2c1grp {
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fsl,pins = <
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MX8MQ_IOMUXC_I2C1_SCL_I2C1_SCL 0x4000007f
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MX8MQ_IOMUXC_I2C1_SDA_I2C1_SDA 0x4000007f
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>;
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};
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pinctrl_i2c2: i2c2grp {
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fsl,pins = <
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MX8MQ_IOMUXC_I2C2_SCL_I2C2_SCL 0x4000007f
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MX8MQ_IOMUXC_I2C2_SDA_I2C2_SDA 0x4000007f
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>;
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};
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pinctrl_otg_vbus: otgvbusgrp {
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fsl,pins = <
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MX8MQ_IOMUXC_NAND_DQS_GPIO3_IO14 0x19 /* USB OTG VBUS Enable */
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>;
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};
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pinctrl_pmic: pmicirq {
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fsl,pins = <
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MX8MQ_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x41
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>;
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};
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pinctrl_uart1: uart1grp {
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fsl,pins = <
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MX8MQ_IOMUXC_UART1_RXD_UART1_DCE_RX 0x49
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MX8MQ_IOMUXC_UART1_TXD_UART1_DCE_TX 0x49
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>;
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};
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pinctrl_uart2: uart2grp {
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fsl,pins = <
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MX8MQ_IOMUXC_UART2_RXD_UART2_DCE_RX 0x49
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MX8MQ_IOMUXC_UART2_TXD_UART2_DCE_TX 0x49
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MX8MQ_IOMUXC_UART4_RXD_UART2_DCE_CTS_B 0x49
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MX8MQ_IOMUXC_UART4_TXD_UART2_DCE_RTS_B 0x49
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>;
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};
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pinctrl_usdhc1: usdhc1grp {
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fsl,pins = <
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MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x83
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MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xc3
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MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0 0xc3
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MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1 0xc3
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MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2 0xc3
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MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3 0xc3
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MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4 0xc3
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MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5 0xc3
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MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6 0xc3
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MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7 0xc3
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MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x83
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>;
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};
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pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
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fsl,pins = <
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MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x85
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MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xc5
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MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0 0xc5
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MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1 0xc5
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MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2 0xc5
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MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3 0xc5
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MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4 0xc5
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MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5 0xc5
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MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6 0xc5
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MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7 0xc5
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MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x85
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>;
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};
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pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
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fsl,pins = <
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MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x87
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MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xc7
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MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0 0xc7
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MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1 0xc7
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MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2 0xc7
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MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3 0xc7
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MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4 0xc7
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MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5 0xc7
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MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6 0xc7
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MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7 0xc7
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MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x87
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>;
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};
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pinctrl_usdhc2_gpio: usdhc2grpgpio {
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fsl,pins = <
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MX8MQ_IOMUXC_SD2_CD_B_GPIO2_IO12 0x41
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>;
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};
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pinctrl_usdhc2: usdhc2grp {
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fsl,pins = <
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MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x83
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MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD 0xc3
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MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0 0xc3
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MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1 0xc3
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MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2 0xc3
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MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3 0xc3
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MX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xc1
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>;
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};
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pinctrl_usdhc2_100mhz: usdhc2grp100mhz {
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fsl,pins = <
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MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x85
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MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD 0xc5
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MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0 0xc5
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MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1 0xc5
|
||||
MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2 0xc5
|
||||
MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3 0xc5
|
||||
MX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xc1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc2_200mhz: usdhc2grp200mhz {
|
||||
fsl,pins = <
|
||||
MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x87
|
||||
MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD 0xc7
|
||||
MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0 0xc7
|
||||
MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1 0xc7
|
||||
MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2 0xc7
|
||||
MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3 0xc7
|
||||
MX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xc1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_wdog: wdoggrp {
|
||||
fsl,pins = <
|
||||
MX8MQ_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0xc6
|
||||
>;
|
||||
};
|
||||
};
|
||||
Loading…
Reference in New Issue
Block a user