ARM: SoC fixes for 3.12-rc

A small batch of fixes this week, mostly OMAP related. Nothing stands out
 as particularly controversial.
 
 Also a fix for a 3.12-rc1 timer regression for Exynos platforms, including
 the Chromebooks.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQIcBAABAgAGBQJSWs1jAAoJEIwa5zzehBx3OLEQAKQCQxbZ+LatgSK3Usk7I9s8
 BXsAvzb26e1frZBQqN8V2o3Mz7sIDwOLJE9pPMgm/Q63+7+EAGR4S1ZO9fLHk7l8
 vSHm/KJicTFtYZkppjnxyULN9biuhBxXJZUwqqNdrC6rmee/OiE4llKpbgPsU3k0
 ZWLwFiPL6ZLgfezsOQNOP7exC48oex1aRok9glAExmryqsk2Cj6l+o8iV8T7Lpok
 mvdoKnCHfhYX8hB+NBlSpedvCOWMwos10+JuXC5MbpewqE7xpX8zLWuGhB3my33a
 EQPQGvpbi9qhcaXX/Bwe3ybnLDA6yi2GCeRA/5wb7uTxCTR/vWzLYWLDpgV0lcv1
 EunPa79U2qj1mcyUNno0tRkjSCefJy7ruW53h4xRWdrBqUbGWVsZ62JKK7hNJP1V
 5oIdEidFnOfXsPxiBg1o/WtjPk9DelSn9zz82l81Vqew+H9Dj684nssCJRXwUxaB
 X2AT+nlxSskQmhK05ZSn8qejQueV7LeUL17Xh9WNFVDsg7YYqi24npg/6gwpfkzC
 i+Pxvk3UseTyThOoUVGWOZy1aeyLHDQO9VccEzrRZRjWtOfpc/ubYVZpGyvgHOY0
 QSaPfLZxsDPoa8bUY/qKiZP/tSSR4GqUzEB3aLYrvuXhasrR5txHbOQtIMEQR4tQ
 udb80OrLAt/vVl5vhDJh
 =HpMx
 -----END PGP SIGNATURE-----

Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC fixes from Olof Johansson:
 "A small batch of fixes this week, mostly OMAP related.  Nothing stands
  out as particularly controversial.

  Also a fix for a 3.12-rc1 timer regression for Exynos platforms,
  including the Chromebooks"

* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
  ARM: exynos: dts: Update 5250 arch timer node with clock frequency
  ARM: OMAP2: RX-51: Add missing max_current to rx51_lp5523_led_config
  ARM: mach-omap2: board-generic: fix undefined symbol
  ARM: dts: Fix pinctrl mask for omap3
  ARM: OMAP3: Fix hardware detection for omap3630 when booted with device tree
  ARM: OMAP2: gpmc-onenand: fix sync mode setup with DT
This commit is contained in:
Linus Torvalds 2013-10-13 09:59:10 -07:00
commit 3552570a21
9 changed files with 50 additions and 12 deletions

View File

@ -96,6 +96,11 @@ timer {
<1 14 0xf08>,
<1 11 0xf08>,
<1 10 0xf08>;
/* Unfortunately we need this since some versions of U-Boot
* on Exynos don't set the CNTFRQ register, so we need the
* value from DT.
*/
clock-frequency = <24000000>;
};
mct@101C0000 {

View File

@ -11,7 +11,7 @@
/ {
model = "TI OMAP3 BeagleBoard xM";
compatible = "ti,omap3-beagle-xm", "ti,omap3-beagle", "ti,omap3";
compatible = "ti,omap3-beagle-xm", "ti,omap36xx", "ti,omap3";
cpus {
cpu@0 {

View File

@ -108,7 +108,7 @@ omap3_pmx_core: pinmux@48002030 {
#address-cells = <1>;
#size-cells = <0>;
pinctrl-single,register-width = <16>;
pinctrl-single,function-mask = <0x7f1f>;
pinctrl-single,function-mask = <0xff1f>;
};
omap3_pmx_wkup: pinmux@0x48002a00 {
@ -117,7 +117,7 @@ omap3_pmx_wkup: pinmux@0x48002a00 {
#address-cells = <1>;
#size-cells = <0>;
pinctrl-single,register-width = <16>;
pinctrl-single,function-mask = <0x7f1f>;
pinctrl-single,function-mask = <0xff1f>;
};
gpio1: gpio@48310000 {

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@ -129,6 +129,24 @@ DT_MACHINE_START(OMAP3_DT, "Generic OMAP3 (Flattened Device Tree)")
.restart = omap3xxx_restart,
MACHINE_END
static const char *omap36xx_boards_compat[] __initdata = {
"ti,omap36xx",
NULL,
};
DT_MACHINE_START(OMAP36XX_DT, "Generic OMAP36xx (Flattened Device Tree)")
.reserve = omap_reserve,
.map_io = omap3_map_io,
.init_early = omap3630_init_early,
.init_irq = omap_intc_of_init,
.handle_irq = omap3_intc_handle_irq,
.init_machine = omap_generic_init,
.init_late = omap3_init_late,
.init_time = omap3_sync32k_timer_init,
.dt_compat = omap36xx_boards_compat,
.restart = omap3xxx_restart,
MACHINE_END
static const char *omap3_gp_boards_compat[] __initdata = {
"ti,omap3-beagle",
"timll,omap3-devkit8000",

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@ -167,38 +167,47 @@ static struct lp55xx_led_config rx51_lp5523_led_config[] = {
.name = "lp5523:kb1",
.chan_nr = 0,
.led_current = 50,
.max_current = 100,
}, {
.name = "lp5523:kb2",
.chan_nr = 1,
.led_current = 50,
.max_current = 100,
}, {
.name = "lp5523:kb3",
.chan_nr = 2,
.led_current = 50,
.max_current = 100,
}, {
.name = "lp5523:kb4",
.chan_nr = 3,
.led_current = 50,
.max_current = 100,
}, {
.name = "lp5523:b",
.chan_nr = 4,
.led_current = 50,
.max_current = 100,
}, {
.name = "lp5523:g",
.chan_nr = 5,
.led_current = 50,
.max_current = 100,
}, {
.name = "lp5523:r",
.chan_nr = 6,
.led_current = 50,
.max_current = 100,
}, {
.name = "lp5523:kb5",
.chan_nr = 7,
.led_current = 50,
.max_current = 100,
}, {
.name = "lp5523:kb6",
.chan_nr = 8,
.led_current = 50,
.max_current = 100,
}
};

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@ -272,9 +272,19 @@ static int omap2_onenand_setup_async(void __iomem *onenand_base)
struct gpmc_timings t;
int ret;
if (gpmc_onenand_data->of_node)
if (gpmc_onenand_data->of_node) {
gpmc_read_settings_dt(gpmc_onenand_data->of_node,
&onenand_async);
if (onenand_async.sync_read || onenand_async.sync_write) {
if (onenand_async.sync_write)
gpmc_onenand_data->flags |=
ONENAND_SYNC_READWRITE;
else
gpmc_onenand_data->flags |= ONENAND_SYNC_READ;
onenand_async.sync_read = false;
onenand_async.sync_write = false;
}
}
omap2_onenand_set_async_mode(onenand_base);

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@ -28,7 +28,7 @@
#define OMAP_PULL_UP (1 << 4)
#define OMAP_ALTELECTRICALSEL (1 << 5)
/* 34xx specific mux bit defines */
/* omap3/4/5 specific mux bit defines */
#define OMAP_INPUT_EN (1 << 8)
#define OMAP_OFF_EN (1 << 9)
#define OMAP_OFFOUT_EN (1 << 10)
@ -36,8 +36,6 @@
#define OMAP_OFF_PULL_EN (1 << 12)
#define OMAP_OFF_PULL_UP (1 << 13)
#define OMAP_WAKEUP_EN (1 << 14)
/* 44xx specific mux bit defines */
#define OMAP_WAKEUP_EVENT (1 << 15)
/* Active pin states */

View File

@ -628,7 +628,7 @@ void __init omap4_local_timer_init(void)
#endif /* CONFIG_HAVE_ARM_TWD */
#endif /* CONFIG_ARCH_OMAP4 */
#ifdef CONFIG_SOC_OMAP5
#if defined(CONFIG_SOC_OMAP5) || defined(CONFIG_SOC_DRA7XX)
void __init omap5_realtime_timer_init(void)
{
omap4_sync32k_timer_init();
@ -636,7 +636,7 @@ void __init omap5_realtime_timer_init(void)
clocksource_of_init();
}
#endif /* CONFIG_SOC_OMAP5 */
#endif /* CONFIG_SOC_OMAP5 || CONFIG_SOC_DRA7XX */
/**
* omap_timer_init - build and register timer device with an

View File

@ -23,7 +23,7 @@
#define PULL_UP (1 << 4)
#define ALTELECTRICALSEL (1 << 5)
/* 34xx specific mux bit defines */
/* omap3/4/5 specific mux bit defines */
#define INPUT_EN (1 << 8)
#define OFF_EN (1 << 9)
#define OFFOUT_EN (1 << 10)
@ -31,8 +31,6 @@
#define OFF_PULL_EN (1 << 12)
#define OFF_PULL_UP (1 << 13)
#define WAKEUP_EN (1 << 14)
/* 44xx specific mux bit defines */
#define WAKEUP_EVENT (1 << 15)
/* Active pin states */