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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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pinctrl: sh-pfc: Updates for v4.12
- Fixes and cleanups. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJY1OQYAAoJEEgEtLw/Ve77FkkP/RDFVCNEY4Z646SuTRdyWZKQ xo5GyRS77PMOg2WEcSd9VytavK0J+AnHXwKiAIbYyedS2ki0TNSpt/tpowMxG1BN 7wdM/pdcoM/81Rof9WVlkQTgi5XZIVn24q2n+L1pj1e+t0dh6cmOQErwfPW0u45n 02XKkBxMhZfa4skwUcwt7YxEkMHV1/e4FuQYPgzKLhS8OGW/5zluF8ViyRvmanMT ATsn/GWOWJuuLqtBcfH1uBz6irY4i3aMnpsdffaG2jHlDQCJ2Vz/KlcyzEzzZqRR LUgKeK7vkNgyMZ0GBpar6ywOGgE6AlM3zKcoV5FAqqH6Qh22iI6mfvoNYIH/gr5K Digrtjd1Iw3BgGjNr9A/GQxM+bASyKu31pyeptOgkn0vI6CM16w9UqVI47qk6frw /29NloFJwTmM+FqPl3inEcC9VqcmWecijYu2S2USYliPbZ8ZqRNMbH+gh25cfzDs 90QgnjfGewPzQ241FJA13Ozqqrj5tOcqoMLjdJr3qD1nPCA+bbujhSYTMKoID+H5 YeDaYfFNCA5Kj3kSPMvyOKGSG2UerVKZhb6SiBO4mso9/e/Hssi99feVINuDLAaZ /ObO00LTn1EEklbfEFryLgS/vgdmFsFGfVhjf1b/8P0HmJm68UaPpHMETrtX1m0/ uDNWIpt7V5HgqsvENE28 =DexH -----END PGP SIGNATURE----- Merge tag 'sh-pfc-for-v4.12-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel pinctrl: sh-pfc: Updates for v4.12 - Fixes and cleanups.
This commit is contained in:
commit
350992348a
@ -586,6 +586,9 @@ static int sh_pfc_probe(struct platform_device *pdev)
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ret = info->ops->init(pfc);
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if (ret < 0)
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return ret;
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/* .init() may have overridden pfc->info */
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info = pfc->info;
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}
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/* Enable dummy states for those platforms without pinctrl support */
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@ -2167,7 +2167,7 @@ static const unsigned int hscif2_clk_b_pins[] = {
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RCAR_GP_PIN(6, 21),
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};
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static const unsigned int hscif2_clk_b_mux[] = {
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HSCK1_B_MARK,
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HSCK2_B_MARK,
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};
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static const unsigned int hscif2_ctrl_b_pins[] = {
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/* RTS, CTS */
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@ -2240,7 +2240,7 @@ static const unsigned int hscif4_ctrl_pins[] = {
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RCAR_GP_PIN(1, 15), RCAR_GP_PIN(1, 14),
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};
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static const unsigned int hscif4_ctrl_mux[] = {
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HRTS4_N_MARK, HCTS3_N_MARK,
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HRTS4_N_MARK, HCTS4_N_MARK,
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};
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static const unsigned int hscif4_data_b_pins[] = {
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@ -3101,6 +3101,55 @@ static const unsigned int pwm6_b_mux[] = {
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PWM6_B_MARK,
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};
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/* - QSPI0 ------------------------------------------------------------------ */
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static const unsigned int qspi0_ctrl_pins[] = {
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/* QSPI0_SPCLK, QSPI0_SSL */
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PIN_NUMBER('W', 3), PIN_NUMBER('Y', 3),
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};
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static const unsigned int qspi0_ctrl_mux[] = {
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QSPI0_SPCLK_MARK, QSPI0_SSL_MARK,
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};
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static const unsigned int qspi0_data2_pins[] = {
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/* QSPI0_MOSI_IO0, QSPI0_MISO_IO1 */
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PIN_A_NUMBER('C', 5), PIN_A_NUMBER('B', 4),
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};
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static const unsigned int qspi0_data2_mux[] = {
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QSPI0_MOSI_IO0_MARK, QSPI0_MISO_IO1_MARK,
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};
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static const unsigned int qspi0_data4_pins[] = {
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/* QSPI0_MOSI_IO0, QSPI0_MISO_IO1, QSPI0_IO2, QSPI0_IO3 */
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PIN_A_NUMBER('C', 5), PIN_A_NUMBER('B', 4),
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PIN_NUMBER('Y', 6), PIN_A_NUMBER('B', 6),
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};
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static const unsigned int qspi0_data4_mux[] = {
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QSPI0_MOSI_IO0_MARK, QSPI0_MISO_IO1_MARK,
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QSPI0_IO2_MARK, QSPI0_IO3_MARK,
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};
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/* - QSPI1 ------------------------------------------------------------------ */
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static const unsigned int qspi1_ctrl_pins[] = {
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/* QSPI1_SPCLK, QSPI1_SSL */
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PIN_NUMBER('V', 3), PIN_NUMBER('V', 5),
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};
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static const unsigned int qspi1_ctrl_mux[] = {
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QSPI1_SPCLK_MARK, QSPI1_SSL_MARK,
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};
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static const unsigned int qspi1_data2_pins[] = {
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/* QSPI1_MOSI_IO0, QSPI1_MISO_IO1 */
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PIN_A_NUMBER('C', 7), PIN_A_NUMBER('E', 5),
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};
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static const unsigned int qspi1_data2_mux[] = {
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QSPI1_MOSI_IO0_MARK, QSPI1_MISO_IO1_MARK,
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};
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static const unsigned int qspi1_data4_pins[] = {
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/* QSPI1_MOSI_IO0, QSPI1_MISO_IO1, QSPI1_IO2, QSPI1_IO3 */
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PIN_A_NUMBER('C', 7), PIN_A_NUMBER('E', 5),
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PIN_A_NUMBER('E', 4), PIN_A_NUMBER('C', 3),
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};
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static const unsigned int qspi1_data4_mux[] = {
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QSPI1_MOSI_IO0_MARK, QSPI1_MISO_IO1_MARK,
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QSPI1_IO2_MARK, QSPI1_IO3_MARK,
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};
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/* - SATA --------------------------------------------------------------------*/
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static const unsigned int sata0_devslp_a_pins[] = {
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/* DEVSLP */
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@ -3299,6 +3348,23 @@ static const unsigned int scif5_clk_pins[] = {
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static const unsigned int scif5_clk_mux[] = {
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SCK5_MARK,
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};
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/* - SCIF Clock ------------------------------------------------------------- */
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static const unsigned int scif_clk_a_pins[] = {
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/* SCIF_CLK */
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RCAR_GP_PIN(6, 23),
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};
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static const unsigned int scif_clk_a_mux[] = {
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SCIF_CLK_A_MARK,
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};
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static const unsigned int scif_clk_b_pins[] = {
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/* SCIF_CLK */
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RCAR_GP_PIN(5, 9),
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};
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static const unsigned int scif_clk_b_mux[] = {
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SCIF_CLK_B_MARK,
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};
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/* - SDHI0 ------------------------------------------------------------------ */
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static const unsigned int sdhi0_data1_pins[] = {
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/* D0 */
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@ -3506,22 +3572,6 @@ static const unsigned int sdhi3_ds_mux[] = {
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SD3_DS_MARK,
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};
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/* - SCIF Clock ------------------------------------------------------------- */
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static const unsigned int scif_clk_a_pins[] = {
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/* SCIF_CLK */
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RCAR_GP_PIN(6, 23),
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};
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static const unsigned int scif_clk_a_mux[] = {
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SCIF_CLK_A_MARK,
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};
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static const unsigned int scif_clk_b_pins[] = {
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/* SCIF_CLK */
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RCAR_GP_PIN(5, 9),
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};
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static const unsigned int scif_clk_b_mux[] = {
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SCIF_CLK_B_MARK,
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};
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/* - SSI -------------------------------------------------------------------- */
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static const unsigned int ssi0_data_pins[] = {
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/* SDATA */
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@ -3724,55 +3774,6 @@ static const unsigned int usb2_mux[] = {
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USB2_PWEN_MARK, USB2_OVC_MARK,
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};
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/* - QSPI0 ------------------------------------------------------------------ */
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static const unsigned int qspi0_ctrl_pins[] = {
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/* QSPI0_SPCLK, QSPI0_SSL */
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PIN_NUMBER('W', 3), PIN_NUMBER('Y', 3),
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};
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static const unsigned int qspi0_ctrl_mux[] = {
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QSPI0_SPCLK_MARK, QSPI0_SSL_MARK,
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};
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static const unsigned int qspi0_data2_pins[] = {
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/* QSPI0_MOSI_IO0, QSPI0_MISO_IO1 */
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PIN_A_NUMBER('C', 5), PIN_A_NUMBER('B', 4),
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};
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static const unsigned int qspi0_data2_mux[] = {
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QSPI0_MOSI_IO0_MARK, QSPI0_MISO_IO1_MARK,
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};
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static const unsigned int qspi0_data4_pins[] = {
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/* QSPI0_MOSI_IO0, QSPI0_MISO_IO1, QSPI0_IO2, QSPI0_IO3 */
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PIN_A_NUMBER('C', 5), PIN_A_NUMBER('B', 4),
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PIN_NUMBER('Y', 6), PIN_A_NUMBER('B', 6),
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};
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static const unsigned int qspi0_data4_mux[] = {
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QSPI0_MOSI_IO0_MARK, QSPI0_MISO_IO1_MARK,
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QSPI0_IO2_MARK, QSPI0_IO3_MARK,
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};
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/* - QSPI1 ------------------------------------------------------------------ */
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static const unsigned int qspi1_ctrl_pins[] = {
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/* QSPI1_SPCLK, QSPI1_SSL */
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PIN_NUMBER('V', 3), PIN_NUMBER('V', 5),
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};
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static const unsigned int qspi1_ctrl_mux[] = {
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QSPI1_SPCLK_MARK, QSPI1_SSL_MARK,
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};
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static const unsigned int qspi1_data2_pins[] = {
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/* QSPI1_MOSI_IO0, QSPI1_MISO_IO1 */
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PIN_A_NUMBER('C', 7), PIN_A_NUMBER('E', 5),
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};
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static const unsigned int qspi1_data2_mux[] = {
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QSPI1_MOSI_IO0_MARK, QSPI1_MISO_IO1_MARK,
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};
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static const unsigned int qspi1_data4_pins[] = {
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/* QSPI1_MOSI_IO0, QSPI1_MISO_IO1, QSPI1_IO2, QSPI1_IO3 */
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PIN_A_NUMBER('C', 7), PIN_A_NUMBER('E', 5),
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PIN_A_NUMBER('E', 4), PIN_A_NUMBER('C', 3),
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};
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static const unsigned int qspi1_data4_mux[] = {
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QSPI1_MOSI_IO0_MARK, QSPI1_MISO_IO1_MARK,
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QSPI1_IO2_MARK, QSPI1_IO3_MARK,
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};
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static const struct sh_pfc_pin_group pinmux_groups[] = {
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SH_PFC_PIN_GROUP(audio_clk_a_a),
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SH_PFC_PIN_GROUP(audio_clk_a_b),
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@ -3990,6 +3991,12 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
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SH_PFC_PIN_GROUP(pwm5_b),
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SH_PFC_PIN_GROUP(pwm6_a),
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SH_PFC_PIN_GROUP(pwm6_b),
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SH_PFC_PIN_GROUP(qspi0_ctrl),
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SH_PFC_PIN_GROUP(qspi0_data2),
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SH_PFC_PIN_GROUP(qspi0_data4),
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SH_PFC_PIN_GROUP(qspi1_ctrl),
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SH_PFC_PIN_GROUP(qspi1_data2),
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SH_PFC_PIN_GROUP(qspi1_data4),
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SH_PFC_PIN_GROUP(sata0_devslp_a),
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SH_PFC_PIN_GROUP(sata0_devslp_b),
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SH_PFC_PIN_GROUP(scif0_data),
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@ -4073,12 +4080,6 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
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SH_PFC_PIN_GROUP(usb0),
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SH_PFC_PIN_GROUP(usb1),
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SH_PFC_PIN_GROUP(usb2),
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SH_PFC_PIN_GROUP(qspi0_ctrl),
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SH_PFC_PIN_GROUP(qspi0_data2),
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SH_PFC_PIN_GROUP(qspi0_data4),
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SH_PFC_PIN_GROUP(qspi1_ctrl),
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SH_PFC_PIN_GROUP(qspi1_data2),
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SH_PFC_PIN_GROUP(qspi1_data4),
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};
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static const char * const audio_clk_groups[] = {
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@ -4393,6 +4394,18 @@ static const char * const pwm6_groups[] = {
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"pwm6_b",
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};
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static const char * const qspi0_groups[] = {
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"qspi0_ctrl",
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"qspi0_data2",
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"qspi0_data4",
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};
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static const char * const qspi1_groups[] = {
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"qspi1_ctrl",
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"qspi1_data2",
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"qspi1_data4",
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};
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static const char * const sata0_groups[] = {
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"sata0_devslp_a",
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"sata0_devslp_b",
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@ -4524,18 +4537,6 @@ static const char * const usb2_groups[] = {
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"usb2",
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};
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static const char * const qspi0_groups[] = {
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"qspi0_ctrl",
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"qspi0_data2",
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"qspi0_data4",
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};
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static const char * const qspi1_groups[] = {
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"qspi1_ctrl",
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"qspi1_data2",
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"qspi1_data4",
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};
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static const struct sh_pfc_function pinmux_functions[] = {
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SH_PFC_FUNCTION(audio_clk),
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SH_PFC_FUNCTION(avb),
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@ -4569,6 +4570,8 @@ static const struct sh_pfc_function pinmux_functions[] = {
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SH_PFC_FUNCTION(pwm4),
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SH_PFC_FUNCTION(pwm5),
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SH_PFC_FUNCTION(pwm6),
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SH_PFC_FUNCTION(qspi0),
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SH_PFC_FUNCTION(qspi1),
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SH_PFC_FUNCTION(sata0),
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SH_PFC_FUNCTION(scif0),
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SH_PFC_FUNCTION(scif1),
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@ -4585,8 +4588,6 @@ static const struct sh_pfc_function pinmux_functions[] = {
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SH_PFC_FUNCTION(usb0),
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SH_PFC_FUNCTION(usb1),
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SH_PFC_FUNCTION(usb2),
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SH_PFC_FUNCTION(qspi0),
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SH_PFC_FUNCTION(qspi1),
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};
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static const struct pinmux_cfg_reg pinmux_config_regs[] = {
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