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ARM: dts: ls1021a: add nodes for on-chip ram

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Although the two nodes constitute one contiguous 128K region, still
describe them separately:

- That's how they are described in the reference manual: "Each OCRAM
  occupies a 64 KB of address region...", and the names ocram1 and
  ocram2 are also as used in the manual.

- The two areas are treated differently by the boot ROM code: OCRAM2 is
  zero-initialized, while, again quoting the RM, "software must perform
  the zero initialization of OCRAM1."

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Rasmus Villemoes 2018-01-03 16:45:45 +01:00 committed by Shawn Guo
parent 7928b2cbe5
commit 35090321a2
1 changed files with 16 additions and 0 deletions
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16
arch/arm/boot/dts/ls1021a.dtsi
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@ -788,5 +788,21 @@ can3: can@2aa0000 {
clock-names = "ipg", "per";
big-endian;
};
ocram1: sram@10000000 {
compatible = "mmio-sram";
reg = <0x0 0x10000000 0x0 0x10000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x0 0x10000000 0x10000>;
};
ocram2: sram@10010000 {
compatible = "mmio-sram";
reg = <0x0 0x10010000 0x0 0x10000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x0 0x10010000 0x10000>;
};
};
};