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clk: imx8mm: Make 1416X/1443X PLL macro definitions common for usage
1416X/1443X PLL are used on i.MX8MM and i.MX8MN and maybe other i.MX8M series SoC later, the macro definitions of these PLLs' initialization should be common for usage. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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parent
1e80936a42
commit
34af5179d2
drivers/clk/imx
@ -26,23 +26,6 @@ static u32 share_count_dcss;
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static u32 share_count_pdm;
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static u32 share_count_nand;
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#define PLL_1416X_RATE(_rate, _m, _p, _s) \
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{ \
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.rate = (_rate), \
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.mdiv = (_m), \
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.pdiv = (_p), \
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.sdiv = (_s), \
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}
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#define PLL_1443X_RATE(_rate, _m, _p, _s, _k) \
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{ \
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.rate = (_rate), \
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.mdiv = (_m), \
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.pdiv = (_p), \
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.sdiv = (_s), \
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.kdiv = (_k), \
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}
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static const struct imx_pll14xx_rate_table imx8mm_pll1416x_tbl[] = {
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PLL_1416X_RATE(1800000000U, 225, 3, 0),
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PLL_1416X_RATE(1600000000U, 200, 3, 0),
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@ -153,6 +153,23 @@ enum imx_pllv3_type {
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struct clk_hw *imx_clk_hw_pllv3(enum imx_pllv3_type type, const char *name,
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const char *parent_name, void __iomem *base, u32 div_mask);
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#define PLL_1416X_RATE(_rate, _m, _p, _s) \
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{ \
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.rate = (_rate), \
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.mdiv = (_m), \
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.pdiv = (_p), \
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.sdiv = (_s), \
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}
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#define PLL_1443X_RATE(_rate, _m, _p, _s, _k) \
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{ \
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.rate = (_rate), \
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.mdiv = (_m), \
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.pdiv = (_p), \
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.sdiv = (_s), \
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.kdiv = (_k), \
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}
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struct clk_hw *imx_clk_pllv4(const char *name, const char *parent_name,
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void __iomem *base);
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