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x86/msr-index: Move AMD MSRs where they belong
... sort them in and fixup comment, while at it. No functional changes. Signed-off-by: Borislav Petkov <bp@suse.de> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Link: http://lkml.kernel.org/r/20190819070140.23708-1-bp@alien8.de Signed-off-by: Ingo Molnar <mingo@kernel.org>
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@ -375,13 +375,17 @@
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/* Alternative perfctr range with full access. */
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#define MSR_IA32_PMC0 0x000004c1
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/* AMD64 MSRs. Not complete. See the architecture manual for a more
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complete list. */
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/*
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* AMD64 MSRs. Not complete. See the architecture manual for a more
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* complete list.
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*/
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#define MSR_AMD64_PATCH_LEVEL 0x0000008b
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#define MSR_AMD64_TSC_RATIO 0xc0000104
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#define MSR_AMD64_NB_CFG 0xc001001f
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#define MSR_AMD64_PATCH_LOADER 0xc0010020
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#define MSR_AMD_PERF_CTL 0xc0010062
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#define MSR_AMD_PERF_STATUS 0xc0010063
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#define MSR_AMD_PSTATE_DEF_BASE 0xc0010064
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#define MSR_AMD64_OSVW_ID_LENGTH 0xc0010140
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#define MSR_AMD64_OSVW_STATUS 0xc0010141
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#define MSR_AMD64_LS_CFG 0xc0011020
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@ -560,9 +564,6 @@
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#define MSR_IA32_PERF_STATUS 0x00000198
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#define MSR_IA32_PERF_CTL 0x00000199
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#define INTEL_PERF_CTL_MASK 0xffff
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#define MSR_AMD_PSTATE_DEF_BASE 0xc0010064
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#define MSR_AMD_PERF_STATUS 0xc0010063
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#define MSR_AMD_PERF_CTL 0xc0010062
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#define MSR_IA32_MPERF 0x000000e7
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#define MSR_IA32_APERF 0x000000e8
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