AuxXxilium/linux_dsm_epyc7002
1
0
Fork 0
mirror of https://github.com/AuxXxilium/linux_dsm_epyc7002.git synced 2024-12-23 05:43:47 +07:00
Code Issues Actions Packages Projects Releases Wiki Activity

drm/amdgpu: add more parameters and functions to amdgpu_umc structure

Browse Source 
expose more parameters and functions of specific umc version to common
umc layer, so amdgpu_umc layer and other blocks could access them

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Tao Zhou 2019-07-29 14:10:54 +08:00 committed by Alex Deucher
parent a55c8d7bda
commit 33b97cf896
2 changed files with 15 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

13
drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h
View File

@ -22,15 +22,28 @@
#define __AMDGPU_UMC_H__
struct amdgpu_umc_funcs {
void (*ras_init)(struct amdgpu_device *adev);
void (*query_ras_error_count)(struct amdgpu_device *adev,
void *ras_error_status);
void (*query_ras_error_address)(struct amdgpu_device *adev,
void *ras_error_status);
void (*enable_umc_index_mode)(struct amdgpu_device *adev,
uint32_t umc_instance);
void (*disable_umc_index_mode)(struct amdgpu_device *adev);
};
struct amdgpu_umc {
/* max error count in one ras query call */
uint32_t max_ras_err_cnt_per_query;
/* number of umc channel instance with memory map register access */
uint32_t channel_inst_num;
/* number of umc instance with memory map register access */
uint32_t umc_inst_num;
/* UMC regiser per channel offset */
uint32_t channel_offs;
/* channel index table of interleaved memory */
const uint32_t *channel_idx_tbl;
const struct amdgpu_umc_funcs *funcs;
};

2
drivers/gpu/drm/amd/amdgpu/umc_v6_1.h
View File

@ -31,6 +31,8 @@
#define UMC_V6_1_CHANNEL_INSTANCE_NUM 4
/* number of umc instance with memory map register access */
#define UMC_V6_1_UMC_INSTANCE_NUM 8
/* total channel instances in one umc block */
#define UMC_V6_1_TOTAL_CHANNEL_NUM (UMC_V6_1_CHANNEL_INSTANCE_NUM * UMC_V6_1_UMC_INSTANCE_NUM)
/* UMC regiser per channel offset */
#define UMC_V6_1_PER_CHANNEL_OFFSET 0x800