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libnvdimm: Update persistence domain value for of_pmem and papr_scm device
Currently, kernel shows the below values "persistence_domain":"cpu_cache" "persistence_domain":"memory_controller" "persistence_domain":"unknown" "cpu_cache" indicates no extra instructions is needed to ensure the persistence of data in the pmem media on power failure. "memory_controller" indicates cpu cache flush instructions are required to flush the data. Platform provides mechanisms to automatically flush outstanding write data from memory controler to pmem on system power loss. Based on the above use memory_controller for non volatile regions on ppc64. Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com> Link: https://lore.kernel.org/r/20200324034821.60869-1-aneesh.kumar@linux.ibm.com Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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@ -361,8 +361,10 @@ static int papr_scm_nvdimm_init(struct papr_scm_priv *p)
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if (p->is_volatile)
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p->region = nvdimm_volatile_region_create(p->bus, &ndr_desc);
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else
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else {
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set_bit(ND_REGION_PERSIST_MEMCTRL, &ndr_desc.flags);
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p->region = nvdimm_pmem_region_create(p->bus, &ndr_desc);
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}
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if (!p->region) {
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dev_err(dev, "Error registering region %pR from %pOF\n",
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ndr_desc.res, p->dn);
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@ -62,8 +62,10 @@ static int of_pmem_region_probe(struct platform_device *pdev)
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if (is_volatile)
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region = nvdimm_volatile_region_create(bus, &ndr_desc);
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else
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else {
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set_bit(ND_REGION_PERSIST_MEMCTRL, &ndr_desc.flags);
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region = nvdimm_pmem_region_create(bus, &ndr_desc);
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}
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if (!region)
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dev_warn(&pdev->dev, "Unable to register region %pR from %pOF\n",
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