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agp/intel: Add support for new chipsets
Both desktop and mobile versions are added. Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
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@ -46,6 +46,10 @@
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#define PCI_DEVICE_ID_INTEL_G45_IG 0x2E22
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#define PCI_DEVICE_ID_INTEL_G41_HB 0x2E30
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#define PCI_DEVICE_ID_INTEL_G41_IG 0x2E32
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#define PCI_DEVICE_ID_INTEL_IGDNG_D_HB 0x0040
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#define PCI_DEVICE_ID_INTEL_IGDNG_D_IG 0x0042
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#define PCI_DEVICE_ID_INTEL_IGDNG_M_HB 0x0044
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#define PCI_DEVICE_ID_INTEL_IGDNG_M_IG 0x0046
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/* cover 915 and 945 variants */
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#define IS_I915 (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_E7221_HB || \
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@ -75,7 +79,9 @@
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agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_Q45_HB || \
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agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_G45_HB || \
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agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_GM45_HB || \
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agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_G41_HB)
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agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_G41_HB || \
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agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IGDNG_D_HB || \
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agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IGDNG_M_HB)
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extern int agp_memory_reserved;
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@ -1211,6 +1217,8 @@ static void intel_i965_get_gtt_range(int *gtt_offset, int *gtt_size)
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case PCI_DEVICE_ID_INTEL_Q45_HB:
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case PCI_DEVICE_ID_INTEL_G45_HB:
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case PCI_DEVICE_ID_INTEL_G41_HB:
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case PCI_DEVICE_ID_INTEL_IGDNG_D_HB:
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case PCI_DEVICE_ID_INTEL_IGDNG_M_HB:
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*gtt_offset = *gtt_size = MB(2);
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break;
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default:
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@ -2186,6 +2194,10 @@ static const struct intel_driver_description {
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"G45/G43", NULL, &intel_i965_driver },
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{ PCI_DEVICE_ID_INTEL_G41_HB, PCI_DEVICE_ID_INTEL_G41_IG, 0,
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"G41", NULL, &intel_i965_driver },
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{ PCI_DEVICE_ID_INTEL_IGDNG_D_HB, PCI_DEVICE_ID_INTEL_IGDNG_D_IG, 0,
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"IGDNG/D", NULL, &intel_i965_driver },
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{ PCI_DEVICE_ID_INTEL_IGDNG_M_HB, PCI_DEVICE_ID_INTEL_IGDNG_M_IG, 0,
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"IGDNG/M", NULL, &intel_i965_driver },
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{ 0, 0, 0, NULL, NULL, NULL }
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};
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@ -2387,6 +2399,8 @@ static struct pci_device_id agp_intel_pci_table[] = {
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ID(PCI_DEVICE_ID_INTEL_Q45_HB),
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ID(PCI_DEVICE_ID_INTEL_G45_HB),
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ID(PCI_DEVICE_ID_INTEL_G41_HB),
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ID(PCI_DEVICE_ID_INTEL_IGDNG_D_HB),
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ID(PCI_DEVICE_ID_INTEL_IGDNG_M_HB),
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{ }
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};
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