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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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ath5k: eliminate CHANNEL_* macros, use AR5K_MODE_* in channel->hw_value
When checking for the band, use channel->band. Change ath5k_hw_nic_wakeup() and ath5k_channel_ok() to take ieee80211_channel. Change ath5k_hw_radio_revision() to take ieee80211_band. Signed-off-by: Pavel Roskin <proski@gnu.org> Tested-by: Sedat Dilek <sedat.dilek@gmail.com> Acked-by: Nick Kossifidis <mickflemm@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Pavel Roskin
John W. Linville
parent
8d44a823c8
commit
32c254645f
@ -685,30 +685,6 @@ struct ath5k_gain {
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#define AR5K_SLOT_TIME_20 880
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#define AR5K_SLOT_TIME_MAX 0xffff
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/* channel_flags */
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#define CHANNEL_CW_INT 0x0008 /* Contention Window interference detected */
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#define CHANNEL_CCK 0x0020 /* CCK channel */
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#define CHANNEL_OFDM 0x0040 /* OFDM channel */
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#define CHANNEL_2GHZ 0x0080 /* 2GHz channel. */
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#define CHANNEL_5GHZ 0x0100 /* 5GHz channel */
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#define CHANNEL_PASSIVE 0x0200 /* Only passive scan allowed */
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#define CHANNEL_DYN 0x0400 /* Dynamic CCK-OFDM channel (for g operation) */
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#define CHANNEL_A (CHANNEL_5GHZ | CHANNEL_OFDM)
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#define CHANNEL_B (CHANNEL_2GHZ | CHANNEL_CCK)
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#define CHANNEL_G (CHANNEL_2GHZ | CHANNEL_OFDM)
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#define CHANNEL_ALL (CHANNEL_OFDM | CHANNEL_CCK | \
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CHANNEL_2GHZ | CHANNEL_5GHZ)
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#define CHANNEL_MODES CHANNEL_ALL
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/*
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* Used internally for ath5k_hw_reset_tx_queue().
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* Also see struct struct ieee80211_channel.
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*/
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#define IS_CHAN_B(_c) ((_c->hw_value & CHANNEL_B) != 0)
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/*
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* The following structure is used to map 2GHz channels to
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* 5GHz Atheros channels.
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@ -965,7 +941,7 @@ enum ath5k_power_mode {
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struct ath5k_capabilities {
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/*
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* Supported PHY modes
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* (ie. CHANNEL_A, CHANNEL_B, ...)
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* (ie. AR5K_MODE_11A, AR5K_MODE_11B, ...)
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*/
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DECLARE_BITMAP(cap_mode, AR5K_MODE_MAX);
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@ -1335,7 +1311,7 @@ void ath5k_unregister_leds(struct ath5k_hw *ah);
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/* Reset Functions */
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int ath5k_hw_nic_wakeup(struct ath5k_hw *ah, int flags, bool initial);
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int ath5k_hw_nic_wakeup(struct ath5k_hw *ah, struct ieee80211_channel *channel);
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int ath5k_hw_on_hold(struct ath5k_hw *ah);
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int ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode,
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struct ieee80211_channel *channel, bool fast, bool skip_pcu);
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@ -1455,13 +1431,13 @@ int ath5k_hw_write_initvals(struct ath5k_hw *ah, u8 mode, bool change_channel);
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/* PHY functions */
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/* Misc PHY functions */
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u16 ath5k_hw_radio_revision(struct ath5k_hw *ah, unsigned int chan);
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u16 ath5k_hw_radio_revision(struct ath5k_hw *ah, enum ieee80211_band band);
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int ath5k_hw_phy_disable(struct ath5k_hw *ah);
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/* Gain_F optimization */
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enum ath5k_rfgain ath5k_hw_gainf_calibrate(struct ath5k_hw *ah);
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int ath5k_hw_rfgain_opt_init(struct ath5k_hw *ah);
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/* PHY/RF channel functions */
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bool ath5k_channel_ok(struct ath5k_hw *ah, u16 freq, unsigned int flags);
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bool ath5k_channel_ok(struct ath5k_hw *ah, struct ieee80211_channel *channel);
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/* PHY calibration */
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void ath5k_hw_init_nfcal_hist(struct ath5k_hw *ah);
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int ath5k_hw_phy_calibrate(struct ath5k_hw *ah,
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@ -145,7 +145,7 @@ int ath5k_hw_init(struct ath5k_hw *ah)
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goto err;
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/* Bring device out of sleep and reset its units */
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ret = ath5k_hw_nic_wakeup(ah, 0, true);
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ret = ath5k_hw_nic_wakeup(ah, NULL);
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if (ret)
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goto err;
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@ -153,7 +153,7 @@ int ath5k_hw_init(struct ath5k_hw *ah)
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ah->ah_phy_revision = ath5k_hw_reg_read(ah, AR5K_PHY_CHIP_ID) &
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0xffffffff;
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ah->ah_radio_5ghz_revision = ath5k_hw_radio_revision(ah,
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CHANNEL_5GHZ);
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IEEE80211_BAND_5GHZ);
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/* Try to identify radio chip based on its srev */
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switch (ah->ah_radio_5ghz_revision & 0xf0) {
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@ -161,14 +161,14 @@ int ath5k_hw_init(struct ath5k_hw *ah)
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ah->ah_radio = AR5K_RF5111;
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ah->ah_single_chip = false;
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ah->ah_radio_2ghz_revision = ath5k_hw_radio_revision(ah,
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CHANNEL_2GHZ);
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IEEE80211_BAND_2GHZ);
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break;
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case AR5K_SREV_RAD_5112:
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case AR5K_SREV_RAD_2112:
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ah->ah_radio = AR5K_RF5112;
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ah->ah_single_chip = false;
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ah->ah_radio_2ghz_revision = ath5k_hw_radio_revision(ah,
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CHANNEL_2GHZ);
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IEEE80211_BAND_2GHZ);
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break;
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case AR5K_SREV_RAD_2413:
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ah->ah_radio = AR5K_RF2413;
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@ -205,7 +205,7 @@ int ath5k_hw_init(struct ath5k_hw *ah)
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ah->ah_radio = AR5K_RF5111;
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ah->ah_single_chip = false;
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ah->ah_radio_2ghz_revision = ath5k_hw_radio_revision(ah,
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CHANNEL_2GHZ);
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IEEE80211_BAND_2GHZ);
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} else if (ah->ah_mac_version == (AR5K_SREV_AR2425 >> 4) ||
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ah->ah_mac_version == (AR5K_SREV_AR2417 >> 4) ||
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ah->ah_phy_revision == AR5K_SREV_PHY_2425) {
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@ -272,20 +272,18 @@ static unsigned int
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ath5k_setup_channels(struct ath5k_hw *ah, struct ieee80211_channel *channels,
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unsigned int mode, unsigned int max)
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{
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unsigned int count, size, chfreq, freq, ch;
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unsigned int count, size, freq, ch;
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enum ieee80211_band band;
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switch (mode) {
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case AR5K_MODE_11A:
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/* 1..220, but 2GHz frequencies are filtered by check_channel */
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size = 220;
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chfreq = CHANNEL_5GHZ;
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band = IEEE80211_BAND_5GHZ;
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break;
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case AR5K_MODE_11B:
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case AR5K_MODE_11G:
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size = 26;
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chfreq = CHANNEL_2GHZ;
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band = IEEE80211_BAND_2GHZ;
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break;
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default:
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@ -300,26 +298,19 @@ ath5k_setup_channels(struct ath5k_hw *ah, struct ieee80211_channel *channels,
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if (freq == 0) /* mapping failed - not a standard channel */
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continue;
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/* Write channel info, needed for ath5k_channel_ok() */
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channels[count].center_freq = freq;
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channels[count].band = band;
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channels[count].hw_value = mode;
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/* Check if channel is supported by the chipset */
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if (!ath5k_channel_ok(ah, freq, chfreq))
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if (!ath5k_channel_ok(ah, &channels[count]))
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continue;
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if (!modparam_all_channels &&
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!ath5k_is_standard_channel(ch, band))
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continue;
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/* Write channel info and increment counter */
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channels[count].center_freq = freq;
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channels[count].band = band;
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switch (mode) {
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case AR5K_MODE_11A:
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case AR5K_MODE_11G:
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channels[count].hw_value = chfreq | CHANNEL_OFDM;
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break;
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case AR5K_MODE_11B:
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channels[count].hw_value = CHANNEL_B;
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}
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count++;
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}
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@ -1780,12 +1780,12 @@ ath5k_eeprom_detach(struct ath5k_hw *ah)
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int
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ath5k_eeprom_mode_from_channel(struct ieee80211_channel *channel)
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{
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switch (channel->hw_value & CHANNEL_MODES) {
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case CHANNEL_A:
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switch (channel->hw_value) {
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case AR5K_MODE_11A:
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return AR5K_EEPROM_MODE_11A;
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case CHANNEL_G:
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case AR5K_MODE_11G:
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return AR5K_EEPROM_MODE_11G;
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case CHANNEL_B:
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case AR5K_MODE_11B:
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return AR5K_EEPROM_MODE_11B;
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default:
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return -1;
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@ -152,7 +152,7 @@ unsigned int ath5k_hw_get_default_slottime(struct ath5k_hw *ah)
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case AR5K_BWMODE_DEFAULT:
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default:
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slot_time = AR5K_INIT_SLOT_TIME_DEFAULT;
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if ((channel->hw_value & CHANNEL_CCK) && !ah->ah_short_slot)
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if ((channel->hw_value == AR5K_MODE_11B) && !ah->ah_short_slot)
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slot_time = AR5K_INIT_SLOT_TIME_B;
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break;
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}
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@ -183,7 +183,7 @@ unsigned int ath5k_hw_get_default_sifs(struct ath5k_hw *ah)
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case AR5K_BWMODE_DEFAULT:
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sifs = AR5K_INIT_SIFS_DEFAULT_BG;
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default:
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if (channel->hw_value & CHANNEL_5GHZ)
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if (channel->band == IEEE80211_BAND_5GHZ)
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sifs = AR5K_INIT_SIFS_DEFAULT_A;
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break;
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}
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@ -38,7 +38,7 @@
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/*
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* Get the PHY Chip revision
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*/
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u16 ath5k_hw_radio_revision(struct ath5k_hw *ah, unsigned int chan)
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u16 ath5k_hw_radio_revision(struct ath5k_hw *ah, enum ieee80211_band band)
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{
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unsigned int i;
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u32 srev;
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@ -47,11 +47,11 @@ u16 ath5k_hw_radio_revision(struct ath5k_hw *ah, unsigned int chan)
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/*
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* Set the radio chip access register
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*/
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switch (chan) {
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case CHANNEL_2GHZ:
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switch (band) {
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case IEEE80211_BAND_2GHZ:
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ath5k_hw_reg_write(ah, AR5K_PHY_SHIFT_2GHZ, AR5K_PHY(0));
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break;
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case CHANNEL_5GHZ:
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case IEEE80211_BAND_5GHZ:
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ath5k_hw_reg_write(ah, AR5K_PHY_SHIFT_5GHZ, AR5K_PHY(0));
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break;
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default:
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@ -84,14 +84,16 @@ u16 ath5k_hw_radio_revision(struct ath5k_hw *ah, unsigned int chan)
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/*
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* Check if a channel is supported
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*/
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bool ath5k_channel_ok(struct ath5k_hw *ah, u16 freq, unsigned int flags)
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bool ath5k_channel_ok(struct ath5k_hw *ah, struct ieee80211_channel *channel)
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{
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u16 freq = channel->center_freq;
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/* Check if the channel is in our supported range */
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if (flags & CHANNEL_2GHZ) {
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if (channel->band == IEEE80211_BAND_2GHZ) {
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if ((freq >= ah->ah_capabilities.cap_range.range_2ghz_min) &&
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(freq <= ah->ah_capabilities.cap_range.range_2ghz_max))
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return true;
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} else if (flags & CHANNEL_5GHZ)
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} else if (channel->band == IEEE80211_BAND_5GHZ)
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if ((freq >= ah->ah_capabilities.cap_range.range_5ghz_min) &&
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(freq <= ah->ah_capabilities.cap_range.range_5ghz_max))
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return true;
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@ -224,7 +226,7 @@ static inline int ath5k_hw_write_ofdm_timings(struct ath5k_hw *ah,
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ds_coef_exp, ds_coef_man, clock;
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BUG_ON(!(ah->ah_version == AR5K_AR5212) ||
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!(channel->hw_value & CHANNEL_OFDM));
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(channel->hw_value == AR5K_MODE_11B));
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/* Get coefficient
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* ALGO: coef = (5 * clock / carrier_freq) / 2
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@ -298,7 +300,7 @@ static void ath5k_hw_wait_for_synth(struct ath5k_hw *ah,
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u32 delay;
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delay = ath5k_hw_reg_read(ah, AR5K_PHY_RX_DELAY) &
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AR5K_PHY_RX_DELAY_M;
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delay = (channel->hw_value & CHANNEL_CCK) ?
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delay = (channel->hw_value == AR5K_MODE_11B) ?
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((delay << 2) / 22) : (delay / 10);
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if (ah->ah_bwmode == AR5K_BWMODE_10MHZ)
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delay = delay << 1;
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@ -798,9 +800,9 @@ static int ath5k_hw_rfregs_init(struct ath5k_hw *ah,
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}
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/* Set Output and Driver bias current (OB/DB) */
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if (channel->hw_value & CHANNEL_2GHZ) {
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if (channel->band == IEEE80211_BAND_2GHZ) {
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if (channel->hw_value & CHANNEL_CCK)
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if (channel->hw_value == AR5K_MODE_11B)
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ee_mode = AR5K_EEPROM_MODE_11B;
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else
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ee_mode = AR5K_EEPROM_MODE_11G;
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@ -825,7 +827,7 @@ static int ath5k_hw_rfregs_init(struct ath5k_hw *ah,
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AR5K_RF_DB_2GHZ, true);
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/* RF5111 always needs OB/DB for 5GHz, even if we use 2GHz */
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} else if ((channel->hw_value & CHANNEL_5GHZ) ||
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} else if ((channel->band == IEEE80211_BAND_5GHZ) ||
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(ah->ah_radio == AR5K_RF5111)) {
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/* For 11a, Turbo and XR we need to choose
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@ -857,7 +859,7 @@ static int ath5k_hw_rfregs_init(struct ath5k_hw *ah,
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if (ah->ah_radio == AR5K_RF5111) {
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/* Set gain_F settings according to current step */
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if (channel->hw_value & CHANNEL_OFDM) {
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if (channel->hw_value != AR5K_MODE_11B) {
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AR5K_REG_WRITE_BITS(ah, AR5K_PHY_FRAME_CTL,
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AR5K_PHY_FRAME_CTL_TX_CLIP,
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@ -914,7 +916,7 @@ static int ath5k_hw_rfregs_init(struct ath5k_hw *ah,
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if (ah->ah_radio == AR5K_RF5112) {
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/* Set gain_F settings according to current step */
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if (channel->hw_value & CHANNEL_OFDM) {
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if (channel->hw_value != AR5K_MODE_11B) {
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ath5k_hw_rfb_op(ah, rf_regs, g_step->gos_param[0],
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AR5K_RF_MIXGAIN_OVR, true);
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@ -1026,7 +1028,7 @@ static int ath5k_hw_rfregs_init(struct ath5k_hw *ah,
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}
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if (ah->ah_radio == AR5K_RF5413 &&
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channel->hw_value & CHANNEL_2GHZ) {
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channel->band == IEEE80211_BAND_2GHZ) {
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ath5k_hw_rfb_op(ah, rf_regs, 1, AR5K_RF_DERBY_CHAN_SEL_MODE,
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true);
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@ -1138,7 +1140,7 @@ static int ath5k_hw_rf5111_channel(struct ath5k_hw *ah,
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*/
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data0 = data1 = 0;
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if (channel->hw_value & CHANNEL_2GHZ) {
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if (channel->band == IEEE80211_BAND_2GHZ) {
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/* Map 2GHz channel to 5GHz Atheros channel ID */
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ret = ath5k_hw_rf5111_chan2athchan(
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ieee80211_frequency_to_channel(channel->center_freq),
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@ -1265,10 +1267,9 @@ static int ath5k_hw_channel(struct ath5k_hw *ah,
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int ret;
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/*
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* Check bounds supported by the PHY (we don't care about regulatory
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* restrictions at this point). Note: hw_value already has the band
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* (CHANNEL_2GHZ, or CHANNEL_5GHZ) so we inform ath5k_channel_ok()
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* of the band by that */
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if (!ath5k_channel_ok(ah, channel->center_freq, channel->hw_value)) {
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* restrictions at this point).
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*/
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if (!ath5k_channel_ok(ah, channel)) {
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ATH5K_ERR(ah,
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"channel frequency (%u MHz) out of supported "
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"band range\n",
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@ -1614,7 +1615,7 @@ int ath5k_hw_phy_calibrate(struct ath5k_hw *ah,
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ret = ath5k_hw_rf511x_iq_calibrate(ah);
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if ((ah->ah_radio == AR5K_RF5111 || ah->ah_radio == AR5K_RF5112) &&
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(channel->hw_value & CHANNEL_OFDM))
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(channel->hw_value != AR5K_MODE_11B))
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ath5k_hw_request_rfgain_probe(ah);
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return ret;
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@ -1641,7 +1642,7 @@ ath5k_hw_set_spur_mitigation_filter(struct ath5k_hw *ah,
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/* Convert current frequency to fbin value (the same way channels
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* are stored on EEPROM, check out ath5k_eeprom_bin2freq) and scale
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* up by 2 so we can compare it later */
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if (channel->hw_value & CHANNEL_2GHZ) {
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if (channel->band == IEEE80211_BAND_2GHZ) {
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chan_fbin = (channel->center_freq - 2300) * 10;
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freq_band = AR5K_EEPROM_BAND_2GHZ;
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} else {
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@ -1703,7 +1704,7 @@ ath5k_hw_set_spur_mitigation_filter(struct ath5k_hw *ah,
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spur_freq_sigma_delta = (spur_delta_phase >> 10);
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symbol_width = AR5K_SPUR_SYMBOL_WIDTH_BASE_100Hz / 4;
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default:
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if (channel->hw_value == CHANNEL_A) {
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if (channel->band == IEEE80211_BAND_5GHZ) {
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/* Both sample_freq and chip_freq are 40MHz */
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spur_delta_phase = (spur_offset << 17) / 25;
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spur_freq_sigma_delta =
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@ -2226,15 +2227,20 @@ ath5k_get_chan_pcal_surrounding_piers(struct ath5k_hw *ah,
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idx_l = 0;
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idx_r = 0;
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if (!(channel->hw_value & CHANNEL_OFDM)) {
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pcinfo = ee->ee_pwr_cal_b;
|
||||
mode = AR5K_EEPROM_MODE_11B;
|
||||
} else if (channel->hw_value & CHANNEL_2GHZ) {
|
||||
pcinfo = ee->ee_pwr_cal_g;
|
||||
mode = AR5K_EEPROM_MODE_11G;
|
||||
} else {
|
||||
switch (channel->hw_value) {
|
||||
case AR5K_EEPROM_MODE_11A:
|
||||
pcinfo = ee->ee_pwr_cal_a;
|
||||
mode = AR5K_EEPROM_MODE_11A;
|
||||
break;
|
||||
case AR5K_EEPROM_MODE_11B:
|
||||
pcinfo = ee->ee_pwr_cal_b;
|
||||
mode = AR5K_EEPROM_MODE_11B;
|
||||
break;
|
||||
case AR5K_EEPROM_MODE_11G:
|
||||
default:
|
||||
pcinfo = ee->ee_pwr_cal_g;
|
||||
mode = AR5K_EEPROM_MODE_11G;
|
||||
break;
|
||||
}
|
||||
max = ee->ee_n_piers[mode] - 1;
|
||||
|
||||
@ -2303,15 +2309,20 @@ ath5k_get_rate_pcal_data(struct ath5k_hw *ah,
|
||||
idx_l = 0;
|
||||
idx_r = 0;
|
||||
|
||||
if (!(channel->hw_value & CHANNEL_OFDM)) {
|
||||
rpinfo = ee->ee_rate_tpwr_b;
|
||||
mode = AR5K_EEPROM_MODE_11B;
|
||||
} else if (channel->hw_value & CHANNEL_2GHZ) {
|
||||
rpinfo = ee->ee_rate_tpwr_g;
|
||||
mode = AR5K_EEPROM_MODE_11G;
|
||||
} else {
|
||||
switch (channel->hw_value) {
|
||||
case AR5K_MODE_11A:
|
||||
rpinfo = ee->ee_rate_tpwr_a;
|
||||
mode = AR5K_EEPROM_MODE_11A;
|
||||
break;
|
||||
case AR5K_MODE_11B:
|
||||
rpinfo = ee->ee_rate_tpwr_b;
|
||||
mode = AR5K_EEPROM_MODE_11B;
|
||||
break;
|
||||
case AR5K_MODE_11G:
|
||||
default:
|
||||
rpinfo = ee->ee_rate_tpwr_g;
|
||||
mode = AR5K_EEPROM_MODE_11G;
|
||||
break;
|
||||
}
|
||||
max = ee->ee_rate_target_pwr_num[mode] - 1;
|
||||
|
||||
@ -2392,20 +2403,20 @@ ath5k_get_max_ctl_power(struct ath5k_hw *ah,
|
||||
|
||||
ctl_mode = ath_regd_get_band_ctl(regulatory, channel->band);
|
||||
|
||||
switch (channel->hw_value & CHANNEL_MODES) {
|
||||
case CHANNEL_A:
|
||||
switch (channel->hw_value) {
|
||||
case AR5K_MODE_11A:
|
||||
if (ah->ah_bwmode == AR5K_BWMODE_40MHZ)
|
||||
ctl_mode |= AR5K_CTL_TURBO;
|
||||
else
|
||||
ctl_mode |= AR5K_CTL_11A;
|
||||
break;
|
||||
case CHANNEL_G:
|
||||
case AR5K_MODE_11G:
|
||||
if (ah->ah_bwmode == AR5K_BWMODE_40MHZ)
|
||||
ctl_mode |= AR5K_CTL_TURBOG;
|
||||
else
|
||||
ctl_mode |= AR5K_CTL_11G;
|
||||
break;
|
||||
case CHANNEL_B:
|
||||
case AR5K_MODE_11B:
|
||||
ctl_mode |= AR5K_CTL_11B;
|
||||
break;
|
||||
default:
|
||||
@ -3290,7 +3301,7 @@ int ath5k_hw_phy_init(struct ath5k_hw *ah, struct ieee80211_channel *channel,
|
||||
|
||||
/* Write OFDM timings on 5212*/
|
||||
if (ah->ah_version == AR5K_AR5212 &&
|
||||
channel->hw_value & CHANNEL_OFDM) {
|
||||
channel->hw_value != AR5K_MODE_11B) {
|
||||
|
||||
ret = ath5k_hw_write_ofdm_timings(ah, channel);
|
||||
if (ret)
|
||||
|
||||
@ -537,7 +537,7 @@ int ath5k_hw_set_ifs_intervals(struct ath5k_hw *ah, unsigned int slot_time)
|
||||
*
|
||||
* Also we have different lowest rate for 802.11a
|
||||
*/
|
||||
if (channel->hw_value & CHANNEL_5GHZ)
|
||||
if (channel->band == IEEE80211_BAND_5GHZ)
|
||||
rate = &ah->sbands[IEEE80211_BAND_5GHZ].bitrates[0];
|
||||
else
|
||||
rate = &ah->sbands[IEEE80211_BAND_2GHZ].bitrates[0];
|
||||
|
||||
@ -102,12 +102,18 @@ static void ath5k_hw_init_core_clock(struct ath5k_hw *ah)
|
||||
/*
|
||||
* Set core clock frequency
|
||||
*/
|
||||
if (channel->hw_value & CHANNEL_5GHZ)
|
||||
clock = 40; /* 802.11a */
|
||||
else if (channel->hw_value & CHANNEL_CCK)
|
||||
clock = 22; /* 802.11b */
|
||||
else
|
||||
clock = 44; /* 802.11g */
|
||||
switch (channel->hw_value) {
|
||||
case AR5K_MODE_11A:
|
||||
clock = 40;
|
||||
break;
|
||||
case AR5K_MODE_11B:
|
||||
clock = 22;
|
||||
break;
|
||||
case AR5K_MODE_11G:
|
||||
default:
|
||||
clock = 44;
|
||||
break;
|
||||
}
|
||||
|
||||
/* Use clock multiplier for non-default
|
||||
* bwmode */
|
||||
@ -581,8 +587,9 @@ int ath5k_hw_on_hold(struct ath5k_hw *ah)
|
||||
|
||||
/*
|
||||
* Bring up MAC + PHY Chips and program PLL
|
||||
* Channel is NULL for the initial wakeup.
|
||||
*/
|
||||
int ath5k_hw_nic_wakeup(struct ath5k_hw *ah, int flags, bool initial)
|
||||
int ath5k_hw_nic_wakeup(struct ath5k_hw *ah, struct ieee80211_channel *channel)
|
||||
{
|
||||
struct pci_dev *pdev = ah->pdev;
|
||||
u32 turbo, mode, clock, bus_flags;
|
||||
@ -592,7 +599,7 @@ int ath5k_hw_nic_wakeup(struct ath5k_hw *ah, int flags, bool initial)
|
||||
mode = 0;
|
||||
clock = 0;
|
||||
|
||||
if ((ath5k_get_bus_type(ah) != ATH_AHB) || !initial) {
|
||||
if ((ath5k_get_bus_type(ah) != ATH_AHB) || channel) {
|
||||
/* Wakeup the device */
|
||||
ret = ath5k_hw_set_power(ah, AR5K_PM_AWAKE, true, 0);
|
||||
if (ret) {
|
||||
@ -652,7 +659,7 @@ int ath5k_hw_nic_wakeup(struct ath5k_hw *ah, int flags, bool initial)
|
||||
|
||||
/* On initialization skip PLL programming since we don't have
|
||||
* a channel / mode set yet */
|
||||
if (initial)
|
||||
if (!channel)
|
||||
return 0;
|
||||
|
||||
if (ah->ah_version != AR5K_AR5210) {
|
||||
@ -668,13 +675,13 @@ int ath5k_hw_nic_wakeup(struct ath5k_hw *ah, int flags, bool initial)
|
||||
clock = AR5K_PHY_PLL_RF5111; /*Zero*/
|
||||
}
|
||||
|
||||
if (flags & CHANNEL_2GHZ) {
|
||||
if (channel->band == IEEE80211_BAND_2GHZ) {
|
||||
mode |= AR5K_PHY_MODE_FREQ_2GHZ;
|
||||
clock |= AR5K_PHY_PLL_44MHZ;
|
||||
|
||||
if (flags & CHANNEL_CCK) {
|
||||
if (channel->hw_value == AR5K_MODE_11B) {
|
||||
mode |= AR5K_PHY_MODE_MOD_CCK;
|
||||
} else if (flags & CHANNEL_OFDM) {
|
||||
} else {
|
||||
/* XXX Dynamic OFDM/CCK is not supported by the
|
||||
* AR5211 so we set MOD_OFDM for plain g (no
|
||||
* CCK headers) operation. We need to test
|
||||
@ -686,27 +693,16 @@ int ath5k_hw_nic_wakeup(struct ath5k_hw *ah, int flags, bool initial)
|
||||
mode |= AR5K_PHY_MODE_MOD_OFDM;
|
||||
else
|
||||
mode |= AR5K_PHY_MODE_MOD_DYN;
|
||||
} else {
|
||||
ATH5K_ERR(ah,
|
||||
"invalid radio modulation mode\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
} else if (flags & CHANNEL_5GHZ) {
|
||||
mode |= AR5K_PHY_MODE_FREQ_5GHZ;
|
||||
} else if (channel->band == IEEE80211_BAND_5GHZ) {
|
||||
mode |= (AR5K_PHY_MODE_FREQ_5GHZ |
|
||||
AR5K_PHY_MODE_MOD_OFDM);
|
||||
|
||||
/* Different PLL setting for 5413 */
|
||||
if (ah->ah_radio == AR5K_RF5413)
|
||||
clock = AR5K_PHY_PLL_40MHZ_5413;
|
||||
else
|
||||
clock |= AR5K_PHY_PLL_40MHZ;
|
||||
|
||||
if (flags & CHANNEL_OFDM)
|
||||
mode |= AR5K_PHY_MODE_MOD_OFDM;
|
||||
else {
|
||||
ATH5K_ERR(ah,
|
||||
"invalid radio modulation mode\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
} else {
|
||||
ATH5K_ERR(ah, "invalid radio frequency mode\n");
|
||||
return -EINVAL;
|
||||
@ -822,7 +818,7 @@ static void ath5k_hw_tweak_initval_settings(struct ath5k_hw *ah,
|
||||
u32 data;
|
||||
ath5k_hw_reg_write(ah, AR5K_PHY_CCKTXCTL_WORLD,
|
||||
AR5K_PHY_CCKTXCTL);
|
||||
if (channel->hw_value & CHANNEL_5GHZ)
|
||||
if (channel->band == IEEE80211_BAND_5GHZ)
|
||||
data = 0xffb81020;
|
||||
else
|
||||
data = 0xffb80d20;
|
||||
@ -905,7 +901,7 @@ static void ath5k_hw_commit_eeprom_settings(struct ath5k_hw *ah,
|
||||
/* Set CCK to OFDM power delta on tx power
|
||||
* adjustment register */
|
||||
if (ah->ah_phy_revision >= AR5K_SREV_PHY_5212A) {
|
||||
if (channel->hw_value == CHANNEL_G)
|
||||
if (channel->hw_value == AR5K_MODE_11G)
|
||||
ath5k_hw_reg_write(ah,
|
||||
AR5K_REG_SM((ee->ee_cck_ofdm_gain_delta * -1),
|
||||
AR5K_PHY_TX_PWR_ADJ_CCK_GAIN_DELTA) |
|
||||
@ -1084,29 +1080,23 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode,
|
||||
ret = 0;
|
||||
}
|
||||
|
||||
switch (channel->hw_value & CHANNEL_MODES) {
|
||||
case CHANNEL_A:
|
||||
mode = AR5K_MODE_11A;
|
||||
mode = channel->hw_value;
|
||||
switch (mode) {
|
||||
case AR5K_MODE_11A:
|
||||
break;
|
||||
case CHANNEL_G:
|
||||
|
||||
case AR5K_MODE_11G:
|
||||
if (ah->ah_version <= AR5K_AR5211) {
|
||||
ATH5K_ERR(ah,
|
||||
"G mode not available on 5210/5211");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
mode = AR5K_MODE_11G;
|
||||
break;
|
||||
case CHANNEL_B:
|
||||
|
||||
case AR5K_MODE_11B:
|
||||
if (ah->ah_version < AR5K_AR5211) {
|
||||
ATH5K_ERR(ah,
|
||||
"B mode not available on 5210");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
mode = AR5K_MODE_11B;
|
||||
break;
|
||||
default:
|
||||
ATH5K_ERR(ah,
|
||||
@ -1192,7 +1182,7 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode,
|
||||
}
|
||||
|
||||
/* Wakeup the device */
|
||||
ret = ath5k_hw_nic_wakeup(ah, channel->hw_value, false);
|
||||
ret = ath5k_hw_nic_wakeup(ah, channel);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user