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drm/amdgpu/dce6: Set MASTER_UPDATE_MODE to 0 in resume_mc_access as well
Looks like this was missed when dce_v6_0.c was added.
Fixes: e2cdf640cb
("drm/amdgpu: add display controller implementation for si v10")
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
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@ -460,9 +460,8 @@ static void dce_v6_0_resume_mc_access(struct amdgpu_device *adev,
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for (i = 0; i < adev->mode_info.num_crtc; i++) {
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if (save->crtc_enabled[i]) {
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tmp = RREG32(mmMASTER_UPDATE_MODE + crtc_offsets[i]);
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if ((tmp & 0x7) != 3) {
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if ((tmp & 0x7) != 0) {
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tmp &= ~0x7;
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tmp |= 0x3;
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WREG32(mmMASTER_UPDATE_MODE + crtc_offsets[i], tmp);
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}
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tmp = RREG32(mmGRPH_UPDATE + crtc_offsets[i]);
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