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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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ARM: dts: imx53-evk: add pinctrl settings
Add pinctrl settings for the exsiting devices in imx53-evk.dts. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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4bb6143cbe
commit
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@ -25,12 +25,16 @@ soc {
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aips@50000000 { /* AIPS1 */
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spba@50000000 {
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esdhc@50004000 { /* ESDHC1 */
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_esdhc1_1>;
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cd-gpios = <&gpio3 13 0>;
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wp-gpios = <&gpio3 14 0>;
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status = "okay";
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};
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ecspi@50010000 { /* ECSPI1 */
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ecspi1_1>;
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fsl,spi-num-chipselects = <2>;
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cs-gpios = <&gpio2 30 0>, <&gpio3 19 0>;
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status = "okay";
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@ -56,6 +60,8 @@ partition@40000 {
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};
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esdhc@50020000 { /* ESDHC3 */
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_esdhc3_1>;
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cd-gpios = <&gpio3 11 0>;
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wp-gpios = <&gpio3 12 0>;
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status = "okay";
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@ -63,17 +69,36 @@ esdhc@50020000 { /* ESDHC3 */
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};
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iomuxc@53fa8000 {
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compatible = "fsl,imx53-iomuxc-evk";
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reg = <0x53fa8000 0x4000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_hog>;
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hog {
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pinctrl_hog: hoggrp {
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fsl,pins = <
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424 0x80000000 /* MX53_PAD_EIM_EB2__GPIO2_30 */
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449 0x80000000 /* MX53_PAD_EIM_D19__GPIO3_19 */
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693 0x80000000 /* MX53_PAD_EIM_DA11__GPIO3_11 */
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697 0x80000000 /* MX53_PAD_EIM_DA12__GPIO3_12 */
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701 0x80000000 /* MX53_PAD_EIM_DA13__GPIO3_13 */
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705 0x80000000 /* MX53_PAD_EIM_DA14__GPIO3_14 */
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868 0x80000000 /* MX53_PAD_PATA_DA_0__GPIO7_6 */
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873 0x80000000 /* MX53_PAD_PATA_DA_1__GPIO7_7 */
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>;
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};
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};
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};
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uart1: serial@53fbc000 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1_1>;
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status = "okay";
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};
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};
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aips@60000000 { /* AIPS2 */
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i2c@63fc4000 { /* I2C2 */
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c2_1>;
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status = "okay";
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pmic: mc13892@08 {
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@ -88,6 +113,8 @@ codec: sgtl5000@0a {
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};
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ethernet@63fec000 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_fec_1>;
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phy-mode = "rmii";
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phy-reset-gpios = <&gpio7 6 0>;
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status = "okay";
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@ -248,6 +248,16 @@ pinctrl_fec_1: fecgrp-1 {
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};
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};
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ecspi1 {
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pinctrl_ecspi1_1: ecspi1grp-1 {
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fsl,pins = <
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433 0x80000000 /* MX53_PAD_EIM_D16__ECSPI1_SCLK */
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439 0x80000000 /* MX53_PAD_EIM_D17__ECSPI1_MISO */
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445 0x80000000 /* MX53_PAD_EIM_D18__ECSPI1_MOSI */
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>;
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};
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};
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esdhc1 {
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pinctrl_esdhc1_1: esdhc1grp-1 {
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fsl,pins = <
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