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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-14 00:26:50 +07:00
drm/amdgpu: Provide page_flip_target hook
Now we can program a flip during a vertical blank period, if it's the one targeted by the flip (or a later one). This allows simplifying amdgpu_flip_work_func considerably. agd: update dce_virtual.c as well. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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c229bfbbd0
commit
325cbba19a
drivers/gpu/drm/amd/amdgpu
@ -730,10 +730,11 @@ void amdgpu_doorbell_get_kfd_info(struct amdgpu_device *adev,
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*/
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struct amdgpu_flip_work {
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struct work_struct flip_work;
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struct delayed_work flip_work;
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struct work_struct unpin_work;
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struct amdgpu_device *adev;
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int crtc_id;
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u32 target_vblank;
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uint64_t base;
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struct drm_pending_vblank_event *event;
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struct amdgpu_bo *old_rbo;
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@ -41,7 +41,7 @@ static void amdgpu_flip_callback(struct fence *f, struct fence_cb *cb)
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container_of(cb, struct amdgpu_flip_work, cb);
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fence_put(f);
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schedule_work(&work->flip_work);
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schedule_work(&work->flip_work.work);
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}
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static bool amdgpu_flip_handle_fence(struct amdgpu_flip_work *work,
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@ -63,16 +63,17 @@ static bool amdgpu_flip_handle_fence(struct amdgpu_flip_work *work,
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static void amdgpu_flip_work_func(struct work_struct *__work)
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{
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struct delayed_work *delayed_work =
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container_of(__work, struct delayed_work, work);
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struct amdgpu_flip_work *work =
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container_of(__work, struct amdgpu_flip_work, flip_work);
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container_of(delayed_work, struct amdgpu_flip_work, flip_work);
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struct amdgpu_device *adev = work->adev;
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struct amdgpu_crtc *amdgpuCrtc = adev->mode_info.crtcs[work->crtc_id];
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struct drm_crtc *crtc = &amdgpuCrtc->base;
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unsigned long flags;
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unsigned i, repcnt = 4;
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int vpos, hpos, stat, min_udelay = 0;
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struct drm_vblank_crtc *vblank = &crtc->dev->vblank[work->crtc_id];
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unsigned i;
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int vpos, hpos;
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if (amdgpu_flip_handle_fence(work, &work->excl))
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return;
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@ -81,55 +82,23 @@ static void amdgpu_flip_work_func(struct work_struct *__work)
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if (amdgpu_flip_handle_fence(work, &work->shared[i]))
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return;
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/* We borrow the event spin lock for protecting flip_status */
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spin_lock_irqsave(&crtc->dev->event_lock, flags);
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/* If this happens to execute within the "virtually extended" vblank
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* interval before the start of the real vblank interval then it needs
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* to delay programming the mmio flip until the real vblank is entered.
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* This prevents completing a flip too early due to the way we fudge
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* our vblank counter and vblank timestamps in order to work around the
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* problem that the hw fires vblank interrupts before actual start of
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* vblank (when line buffer refilling is done for a frame). It
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* complements the fudging logic in amdgpu_get_crtc_scanoutpos() for
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* timestamping and amdgpu_get_vblank_counter_kms() for vblank counts.
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*
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* In practice this won't execute very often unless on very fast
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* machines because the time window for this to happen is very small.
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/* Wait until we're out of the vertical blank period before the one
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* targeted by the flip
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*/
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while (amdgpuCrtc->enabled && --repcnt) {
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/* GET_DISTANCE_TO_VBLANKSTART returns distance to real vblank
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* start in hpos, and to the "fudged earlier" vblank start in
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* vpos.
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*/
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stat = amdgpu_get_crtc_scanoutpos(adev->ddev, work->crtc_id,
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GET_DISTANCE_TO_VBLANKSTART,
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&vpos, &hpos, NULL, NULL,
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&crtc->hwmode);
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if ((stat & (DRM_SCANOUTPOS_VALID | DRM_SCANOUTPOS_ACCURATE)) !=
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(DRM_SCANOUTPOS_VALID | DRM_SCANOUTPOS_ACCURATE) ||
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!(vpos >= 0 && hpos <= 0))
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break;
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/* Sleep at least until estimated real start of hw vblank */
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min_udelay = (-hpos + 1) * max(vblank->linedur_ns / 1000, 5);
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if (min_udelay > vblank->framedur_ns / 2000) {
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/* Don't wait ridiculously long - something is wrong */
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repcnt = 0;
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break;
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}
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spin_unlock_irqrestore(&crtc->dev->event_lock, flags);
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usleep_range(min_udelay, 2 * min_udelay);
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spin_lock_irqsave(&crtc->dev->event_lock, flags);
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if (amdgpuCrtc->enabled &&
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(amdgpu_get_crtc_scanoutpos(adev->ddev, work->crtc_id, 0,
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&vpos, &hpos, NULL, NULL,
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&crtc->hwmode)
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& (DRM_SCANOUTPOS_VALID | DRM_SCANOUTPOS_IN_VBLANK)) ==
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(DRM_SCANOUTPOS_VALID | DRM_SCANOUTPOS_IN_VBLANK) &&
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(int)(work->target_vblank -
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amdgpu_get_vblank_counter_kms(adev->ddev, amdgpuCrtc->crtc_id)) > 0) {
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schedule_delayed_work(&work->flip_work, usecs_to_jiffies(1000));
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return;
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}
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if (!repcnt)
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DRM_DEBUG_DRIVER("Delay problem on crtc %d: min_udelay %d, "
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"framedur %d, linedur %d, stat %d, vpos %d, "
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"hpos %d\n", work->crtc_id, min_udelay,
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vblank->framedur_ns / 1000,
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vblank->linedur_ns / 1000, stat, vpos, hpos);
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/* We borrow the event spin lock for protecting flip_status */
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spin_lock_irqsave(&crtc->dev->event_lock, flags);
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/* Do the flip (mmio) */
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adev->mode_info.funcs->page_flip(adev, work->crtc_id, work->base, work->async);
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@ -169,10 +138,10 @@ static void amdgpu_unpin_work_func(struct work_struct *__work)
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kfree(work);
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}
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int amdgpu_crtc_page_flip(struct drm_crtc *crtc,
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struct drm_framebuffer *fb,
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struct drm_pending_vblank_event *event,
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uint32_t page_flip_flags)
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int amdgpu_crtc_page_flip_target(struct drm_crtc *crtc,
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struct drm_framebuffer *fb,
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struct drm_pending_vblank_event *event,
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uint32_t page_flip_flags, uint32_t target)
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{
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struct drm_device *dev = crtc->dev;
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struct amdgpu_device *adev = dev->dev_private;
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@ -191,7 +160,7 @@ int amdgpu_crtc_page_flip(struct drm_crtc *crtc,
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if (work == NULL)
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return -ENOMEM;
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INIT_WORK(&work->flip_work, amdgpu_flip_work_func);
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INIT_DELAYED_WORK(&work->flip_work, amdgpu_flip_work_func);
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INIT_WORK(&work->unpin_work, amdgpu_unpin_work_func);
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work->event = event;
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@ -237,12 +206,8 @@ int amdgpu_crtc_page_flip(struct drm_crtc *crtc,
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amdgpu_bo_unreserve(new_rbo);
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work->base = base;
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r = drm_crtc_vblank_get(crtc);
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if (r) {
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DRM_ERROR("failed to get vblank before flip\n");
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goto pflip_cleanup;
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}
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work->target_vblank = target - drm_crtc_vblank_count(crtc) +
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amdgpu_get_vblank_counter_kms(dev, work->crtc_id);
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/* we borrow the event spin lock for protecting flip_wrok */
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spin_lock_irqsave(&crtc->dev->event_lock, flags);
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@ -250,7 +215,7 @@ int amdgpu_crtc_page_flip(struct drm_crtc *crtc,
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DRM_DEBUG_DRIVER("flip queue: crtc already busy\n");
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spin_unlock_irqrestore(&crtc->dev->event_lock, flags);
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r = -EBUSY;
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goto vblank_cleanup;
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goto pflip_cleanup;
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}
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amdgpu_crtc->pflip_status = AMDGPU_FLIP_PENDING;
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@ -262,12 +227,9 @@ int amdgpu_crtc_page_flip(struct drm_crtc *crtc,
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/* update crtc fb */
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crtc->primary->fb = fb;
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spin_unlock_irqrestore(&crtc->dev->event_lock, flags);
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amdgpu_flip_work_func(&work->flip_work);
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amdgpu_flip_work_func(&work->flip_work.work);
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return 0;
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vblank_cleanup:
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drm_crtc_vblank_put(crtc);
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pflip_cleanup:
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if (unlikely(amdgpu_bo_reserve(new_rbo, false) != 0)) {
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DRM_ERROR("failed to reserve new rbo in error path\n");
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@ -591,10 +591,10 @@ int amdgpu_align_pitch(struct amdgpu_device *adev, int width, int bpp, bool tile
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void amdgpu_print_display_setup(struct drm_device *dev);
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int amdgpu_modeset_create_props(struct amdgpu_device *adev);
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int amdgpu_crtc_set_config(struct drm_mode_set *set);
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int amdgpu_crtc_page_flip(struct drm_crtc *crtc,
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struct drm_framebuffer *fb,
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struct drm_pending_vblank_event *event,
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uint32_t page_flip_flags);
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int amdgpu_crtc_page_flip_target(struct drm_crtc *crtc,
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struct drm_framebuffer *fb,
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struct drm_pending_vblank_event *event,
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uint32_t page_flip_flags, uint32_t target);
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extern const struct drm_mode_config_funcs amdgpu_mode_funcs;
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#endif
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@ -2737,7 +2737,7 @@ static const struct drm_crtc_funcs dce_v10_0_crtc_funcs = {
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.gamma_set = dce_v10_0_crtc_gamma_set,
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.set_config = amdgpu_crtc_set_config,
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.destroy = dce_v10_0_crtc_destroy,
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.page_flip = amdgpu_crtc_page_flip,
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.page_flip_target = amdgpu_crtc_page_flip_target,
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};
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static void dce_v10_0_crtc_dpms(struct drm_crtc *crtc, int mode)
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@ -2755,7 +2755,7 @@ static const struct drm_crtc_funcs dce_v11_0_crtc_funcs = {
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.gamma_set = dce_v11_0_crtc_gamma_set,
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.set_config = amdgpu_crtc_set_config,
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.destroy = dce_v11_0_crtc_destroy,
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.page_flip = amdgpu_crtc_page_flip,
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.page_flip_target = amdgpu_crtc_page_flip_target,
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};
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static void dce_v11_0_crtc_dpms(struct drm_crtc *crtc, int mode)
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@ -2598,7 +2598,7 @@ static const struct drm_crtc_funcs dce_v8_0_crtc_funcs = {
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.gamma_set = dce_v8_0_crtc_gamma_set,
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.set_config = amdgpu_crtc_set_config,
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.destroy = dce_v8_0_crtc_destroy,
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.page_flip = amdgpu_crtc_page_flip,
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.page_flip_target = amdgpu_crtc_page_flip_target,
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};
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static void dce_v8_0_crtc_dpms(struct drm_crtc *crtc, int mode)
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@ -188,7 +188,7 @@ static const struct drm_crtc_funcs dce_virtual_crtc_funcs = {
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.gamma_set = dce_virtual_crtc_gamma_set,
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.set_config = amdgpu_crtc_set_config,
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.destroy = dce_virtual_crtc_destroy,
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.page_flip = amdgpu_crtc_page_flip,
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.page_flip_target = amdgpu_crtc_page_flip_target,
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};
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static void dce_virtual_crtc_dpms(struct drm_crtc *crtc, int mode)
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