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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-13 15:06:52 +07:00
drm/i915/overlay: Move capabilities bits to common info block.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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0ddc1289f3
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31578148b2
@ -62,49 +62,60 @@ extern int intel_agp_enabled;
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static const struct intel_device_info intel_i830_info = {
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.gen = 2, .is_i8xx = 1, .is_mobile = 1, .cursor_needs_physical = 1,
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.has_overlay = 1, .overlay_needs_physical = 1,
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};
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static const struct intel_device_info intel_845g_info = {
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.gen = 2, .is_i8xx = 1,
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.has_overlay = 1, .overlay_needs_physical = 1,
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};
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static const struct intel_device_info intel_i85x_info = {
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.gen = 2, .is_i8xx = 1, .is_i85x = 1, .is_mobile = 1,
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.cursor_needs_physical = 1,
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.has_overlay = 1, .overlay_needs_physical = 1,
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};
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static const struct intel_device_info intel_i865g_info = {
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.gen = 2, .is_i8xx = 1,
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.has_overlay = 1, .overlay_needs_physical = 1,
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};
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static const struct intel_device_info intel_i915g_info = {
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.gen = 3, .is_i915g = 1, .is_i9xx = 1, .cursor_needs_physical = 1,
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.has_overlay = 1, .overlay_needs_physical = 1,
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};
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static const struct intel_device_info intel_i915gm_info = {
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.gen = 3, .is_i9xx = 1, .is_mobile = 1,
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.cursor_needs_physical = 1,
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.has_overlay = 1, .overlay_needs_physical = 1,
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};
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static const struct intel_device_info intel_i945g_info = {
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.gen = 3, .is_i9xx = 1, .has_hotplug = 1, .cursor_needs_physical = 1,
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.has_overlay = 1, .overlay_needs_physical = 1,
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};
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static const struct intel_device_info intel_i945gm_info = {
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.gen = 3, .is_i945gm = 1, .is_i9xx = 1, .is_mobile = 1,
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.has_hotplug = 1, .cursor_needs_physical = 1,
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.has_overlay = 1, .overlay_needs_physical = 1,
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};
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static const struct intel_device_info intel_i965g_info = {
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.gen = 4, .is_broadwater = 1, .is_i965g = 1, .is_i9xx = 1,
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.has_hotplug = 1,
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.has_overlay = 1,
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};
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static const struct intel_device_info intel_i965gm_info = {
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.gen = 4, .is_crestline = 1, .is_i965g = 1, .is_i965gm = 1, .is_i9xx = 1,
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.is_mobile = 1, .has_fbc = 1, .has_rc6 = 1, .has_hotplug = 1,
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.has_overlay = 1,
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};
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static const struct intel_device_info intel_g33_info = {
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.gen = 3, .is_g33 = 1, .is_i9xx = 1,
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.need_gfx_hws = 1, .has_hotplug = 1,
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.has_overlay = 1,
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};
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static const struct intel_device_info intel_g45_info = {
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@ -121,6 +132,7 @@ static const struct intel_device_info intel_gm45_info = {
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static const struct intel_device_info intel_pineview_info = {
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.gen = 3, .is_g33 = 1, .is_pineview = 1, .is_mobile = 1, .is_i9xx = 1,
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.need_gfx_hws = 1, .has_hotplug = 1,
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.has_overlay = 1,
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};
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static const struct intel_device_info intel_ironlake_d_info = {
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@ -213,6 +213,8 @@ struct intel_device_info {
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u8 has_pipe_cxsr : 1;
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u8 has_hotplug : 1;
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u8 cursor_needs_physical : 1;
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u8 has_overlay : 1;
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u8 overlay_needs_physical : 1;
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};
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enum no_fbc_reason {
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@ -1218,6 +1220,9 @@ static inline void i915_write(struct drm_i915_private *dev_priv, u32 reg,
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#define HAS_BSD(dev) (IS_IRONLAKE(dev) || IS_G4X(dev))
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#define I915_NEED_GFX_HWS(dev) (INTEL_INFO(dev)->need_gfx_hws)
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#define HAS_OVERLAY(dev) (INTEL_INFO(dev)->has_overlay)
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#define OVERLAY_NEEDS_PHYSICAL(dev) (INTEL_INFO(dev)->overlay_needs_physical)
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/* With the 945 and later, Y tiling got adjusted so that it was 32 128-byte
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* rows, which changed the alignment requirements and fence programming.
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*/
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@ -173,9 +173,6 @@ struct overlay_registers {
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/* overlay flip addr flag */
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#define OFC_UPDATE 0x1
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#define OVERLAY_NONPHYSICAL(dev) (IS_G33(dev) || IS_I965G(dev))
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#define OVERLAY_EXISTS(dev) (!IS_G4X(dev) && !IS_IRONLAKE(dev) && !IS_GEN6(dev))
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static struct overlay_registers *intel_overlay_map_regs_atomic(struct intel_overlay *overlay)
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{
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drm_i915_private_t *dev_priv = overlay->dev->dev_private;
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@ -184,7 +181,9 @@ static struct overlay_registers *intel_overlay_map_regs_atomic(struct intel_over
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/* no recursive mappings */
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BUG_ON(overlay->virt_addr);
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if (OVERLAY_NONPHYSICAL(overlay->dev)) {
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if (OVERLAY_NEEDS_PHYSICAL(overlay->dev)) {
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regs = overlay->reg_bo->phys_obj->handle->vaddr;
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} else {
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regs = io_mapping_map_atomic_wc(dev_priv->mm.gtt_mapping,
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overlay->reg_bo->gtt_offset,
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KM_USER0);
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@ -193,15 +192,14 @@ static struct overlay_registers *intel_overlay_map_regs_atomic(struct intel_over
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DRM_ERROR("failed to map overlay regs in GTT\n");
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return NULL;
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}
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} else
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regs = overlay->reg_bo->phys_obj->handle->vaddr;
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}
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return overlay->virt_addr = regs;
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}
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static void intel_overlay_unmap_regs_atomic(struct intel_overlay *overlay)
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{
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if (OVERLAY_NONPHYSICAL(overlay->dev))
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if (!OVERLAY_NEEDS_PHYSICAL(overlay->dev))
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io_mapping_unmap_atomic(overlay->virt_addr, KM_USER0);
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overlay->virt_addr = NULL;
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@ -1366,7 +1364,7 @@ void intel_setup_overlay(struct drm_device *dev)
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struct overlay_registers *regs;
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int ret;
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if (!OVERLAY_EXISTS(dev))
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if (!HAS_OVERLAY(dev))
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return;
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overlay = kzalloc(sizeof(struct intel_overlay), GFP_KERNEL);
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@ -1379,7 +1377,16 @@ void intel_setup_overlay(struct drm_device *dev)
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goto out_free;
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overlay->reg_bo = to_intel_bo(reg_bo);
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if (OVERLAY_NONPHYSICAL(dev)) {
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if (OVERLAY_NEEDS_PHYSICAL(dev)) {
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ret = i915_gem_attach_phys_object(dev, reg_bo,
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I915_GEM_PHYS_OVERLAY_REGS,
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0);
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if (ret) {
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DRM_ERROR("failed to attach phys overlay regs\n");
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goto out_free_bo;
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}
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overlay->flip_addr = overlay->reg_bo->phys_obj->handle->busaddr;
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} else {
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ret = i915_gem_object_pin(reg_bo, PAGE_SIZE);
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if (ret) {
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DRM_ERROR("failed to pin overlay register bo\n");
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@ -1392,15 +1399,6 @@ void intel_setup_overlay(struct drm_device *dev)
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DRM_ERROR("failed to move overlay register bo into the GTT\n");
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goto out_unpin_bo;
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}
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} else {
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ret = i915_gem_attach_phys_object(dev, reg_bo,
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I915_GEM_PHYS_OVERLAY_REGS,
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0);
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if (ret) {
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DRM_ERROR("failed to attach phys overlay regs\n");
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goto out_free_bo;
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}
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overlay->flip_addr = overlay->reg_bo->phys_obj->handle->busaddr;
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}
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/* init all values */
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@ -1471,10 +1469,10 @@ intel_overlay_capture_error_state(struct drm_device *dev)
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error->dovsta = I915_READ(DOVSTA);
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error->isr = I915_READ(ISR);
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if (OVERLAY_NONPHYSICAL(overlay->dev))
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error->base = (long) overlay->reg_bo->gtt_offset;
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else
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if (OVERLAY_NEEDS_PHYSICAL(overlay->dev))
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error->base = (long) overlay->reg_bo->phys_obj->handle->vaddr;
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else
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error->base = (long) overlay->reg_bo->gtt_offset;
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regs = intel_overlay_map_regs_atomic(overlay);
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if (!regs)
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