mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-26 05:00:53 +07:00
Actions Semi ARM64 based SoC DT for 4.13
This adds an initial DT for the S900 SoC and a devboard based on it. -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQIcBAABAgAGBQJZTULJAAoJEPou0S0+fgE/00gP/3V47/jMZmIcRZymiRXUkZAc cZiIkeKXa0LEXQPk5iTAVXCU7vfhWHHq3g9lA+CWMhbBKO+6K/RwipdscqAxLNfF kaIIO4M1CEVB9R55JR2jTd6qEHBD+MibTxYc2bbfrWJtbaQJWZ+ep0oKqpOccoby BRb5yhBt0b0K4GOlgOQHNVIc6sbdhH8ZJ+n/Dqj57eDxzH/u+DUaWdwAIHDaN8Qw +qAM4HTYSXnlwjWgRgeBws7adDV8wDLbQwpNrmHjDBGxZ8BTIZxrnydKG7AUMIPi o8A50c7khq4xFQN+IhhNrhwQpilMRjlZc84DwqBsFdaUzei4jYZmY8udxKyuJdhr ZMerSnvoBOew/KpyvhxaT0aHD0Zlxzl6yKy7dw3FAbqnQTUUmpwp2kM1bsNteMwU FD5YvLv04R8y9w8XJdsPATQiqu06dZIBZdHubI4D3hWMMYi963eH7KE9ON8mq5Uc d7Ex1+q9DvjiwOlPtTAcLoeAQeVKeojrDQTTpH4GR3PtukJVBLzS1IiFl1qweele G1i0WTUgSuYmlvoWOIX4jzeejiXab5WOUszdsIT5qx0LIZKnS/XfQe/kjOYcto6Z 3244hW7AXkdVGOieUX4d+DiizlvJe6VPbq5RJ6Ka5ZmWIdUbH5KkDT4F/jSoi4d4 Ny4hC2twmGfmUIFqbBpp =WMGS -----END PGP SIGNATURE----- Merge tag 'actions-arm64-dt-for-4.13' of git://git.kernel.org/pub/scm/linux/kernel/git/afaerber/linux-actions into next/dt64 Pull "Actions Semi ARM64 based SoC DT for 4.13" from Andreas Färber: This adds an initial DT for the S900 SoC and a devboard based on it. * tag 'actions-arm64-dt-for-4.13' of git://git.kernel.org/pub/scm/linux/kernel/git/afaerber/linux-actions: arm64: dts: Add Actions Semi S900 and Bubblegum-96 dt-bindings: Add vendor prefix for uCRobotics
This commit is contained in:
Arnd Bergmann
commit
30c2a65828
@ -333,6 +333,7 @@ tronfy Tronfy
|
||||
tronsmart Tronsmart
|
||||
truly Truly Semiconductors Limited
|
||||
tyan Tyan Computer Corporation
|
||||
ucrobotics uCRobotics
|
||||
udoo Udoo
|
||||
uniwest United Western Technologies Corp (UniWest)
|
||||
upisemi uPI Semiconductor Corp.
|
||||
|
||||
@ -1,3 +1,4 @@
|
||||
dts-dirs += actions
|
||||
dts-dirs += al
|
||||
dts-dirs += allwinner
|
||||
dts-dirs += altera
|
||||
|
||||
5
arch/arm64/boot/dts/actions/Makefile
Normal file
5
arch/arm64/boot/dts/actions/Makefile
Normal file
@ -0,0 +1,5 @@
|
||||
dtb-$(CONFIG_ARCH_ACTIONS) += s900-bubblegum-96.dtb
|
||||
|
||||
always := $(dtb-y)
|
||||
subdir-y := $(dts-dirs)
|
||||
clean-files := *.dtb
|
||||
35
arch/arm64/boot/dts/actions/s900-bubblegum-96.dts
Normal file
35
arch/arm64/boot/dts/actions/s900-bubblegum-96.dts
Normal file
@ -0,0 +1,35 @@
|
||||
/*
|
||||
* Copyright (c) 2017 Andreas Färber
|
||||
*
|
||||
* SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "s900.dtsi"
|
||||
|
||||
/ {
|
||||
compatible = "ucrobotics,bubblegum-96", "actions,s900";
|
||||
model = "Bubblegum-96";
|
||||
|
||||
aliases {
|
||||
serial5 = &uart5;
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial5:115200n8";
|
||||
};
|
||||
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0x0 0x0 0x0 0x80000000>;
|
||||
};
|
||||
};
|
||||
|
||||
&timer {
|
||||
clocks = <&hosc>;
|
||||
};
|
||||
|
||||
&uart5 {
|
||||
status = "okay";
|
||||
};
|
||||
164
arch/arm64/boot/dts/actions/s900.dtsi
Normal file
164
arch/arm64/boot/dts/actions/s900.dtsi
Normal file
@ -0,0 +1,164 @@
|
||||
/*
|
||||
* Copyright (c) 2017 Andreas Färber
|
||||
*
|
||||
* SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
*/
|
||||
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
|
||||
/ {
|
||||
compatible = "actions,s900";
|
||||
interrupt-parent = <&gic>;
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
|
||||
cpus {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <0>;
|
||||
|
||||
cpu0: cpu@0 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a53", "arm,armv8";
|
||||
reg = <0x0 0x0>;
|
||||
enable-method = "psci";
|
||||
};
|
||||
|
||||
cpu1: cpu@1 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a53", "arm,armv8";
|
||||
reg = <0x0 0x1>;
|
||||
enable-method = "psci";
|
||||
};
|
||||
|
||||
cpu2: cpu@2 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a53", "arm,armv8";
|
||||
reg = <0x0 0x2>;
|
||||
enable-method = "psci";
|
||||
};
|
||||
|
||||
cpu3: cpu@3 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a53", "arm,armv8";
|
||||
reg = <0x0 0x3>;
|
||||
enable-method = "psci";
|
||||
};
|
||||
};
|
||||
|
||||
reserved-memory {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
|
||||
secmon@1f000000 {
|
||||
reg = <0x0 0x1f000000 0x0 0x1000000>;
|
||||
no-map;
|
||||
};
|
||||
};
|
||||
|
||||
psci {
|
||||
compatible = "arm,psci-0.2";
|
||||
method = "smc";
|
||||
};
|
||||
|
||||
arm-pmu {
|
||||
compatible = "arm,cortex-a53-pmu";
|
||||
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
|
||||
};
|
||||
|
||||
timer {
|
||||
compatible = "arm,armv8-timer";
|
||||
interrupts = <GIC_PPI 13
|
||||
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
|
||||
<GIC_PPI 14
|
||||
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
|
||||
<GIC_PPI 11
|
||||
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
|
||||
<GIC_PPI 10
|
||||
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
|
||||
};
|
||||
|
||||
hosc: hosc {
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <24000000>;
|
||||
#clock-cells = <0>;
|
||||
};
|
||||
|
||||
soc {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
|
||||
gic: interrupt-controller@e00f1000 {
|
||||
compatible = "arm,gic-400";
|
||||
reg = <0x0 0xe00f1000 0x0 0x1000>,
|
||||
<0x0 0xe00f2000 0x0 0x2000>,
|
||||
<0x0 0xe00f4000 0x0 0x2000>,
|
||||
<0x0 0xe00f6000 0x0 0x2000>;
|
||||
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <3>;
|
||||
};
|
||||
|
||||
uart0: serial@e0120000 {
|
||||
compatible = "actions,s900-uart", "actions,owl-uart";
|
||||
reg = <0x0 0xe0120000 0x0 0x2000>;
|
||||
interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart1: serial@e0122000 {
|
||||
compatible = "actions,s900-uart", "actions,owl-uart";
|
||||
reg = <0x0 0xe0122000 0x0 0x2000>;
|
||||
interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart2: serial@e0124000 {
|
||||
compatible = "actions,s900-uart", "actions,owl-uart";
|
||||
reg = <0x0 0xe0124000 0x0 0x2000>;
|
||||
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart3: serial@e0126000 {
|
||||
compatible = "actions,s900-uart", "actions,owl-uart";
|
||||
reg = <0x0 0xe0126000 0x0 0x2000>;
|
||||
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart4: serial@e0128000 {
|
||||
compatible = "actions,s900-uart", "actions,owl-uart";
|
||||
reg = <0x0 0xe0128000 0x0 0x2000>;
|
||||
interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart5: serial@e012a000 {
|
||||
compatible = "actions,s900-uart", "actions,owl-uart";
|
||||
reg = <0x0 0xe012a000 0x0 0x2000>;
|
||||
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart6: serial@e012c000 {
|
||||
compatible = "actions,s900-uart", "actions,owl-uart";
|
||||
reg = <0x0 0xe012c000 0x0 0x2000>;
|
||||
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
timer: timer@e0228000 {
|
||||
compatible = "actions,s900-timer";
|
||||
reg = <0x0 0xe0228000 0x0 0x8000>;
|
||||
interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "timer1";
|
||||
};
|
||||
};
|
||||
};
|
||||
Loading…
Reference in New Issue
Block a user