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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-16 05:07:59 +07:00
iwlwifi: add tm commands for sram reading by dumpit
Create new testmode commands and attributes to suppot sram data reading. Because the amount of sram data may exceed single skb packet size. Using the nl80211 dump it funtion to deliver sram data to userspace. - IWL_TM_CMD_APP2DEV_READ_SRAM - IWL_TM_CMD_APP2DEV_DUMP_SRAM - IWL_TM_ATTR_SRAM_ADDR - IWL_TM_ATTR_SRAM_SIZE - IWL_TM_ATTR_SRAM_DUMP Signed-off-by: Kenny Hsu <kenny.hsu@intel.com> Signed-off-by: Wey-Yi Guy <wey-yi.w.guy@intel.com>
This commit is contained in:
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137ce797e2
commit
306713fd1a
@ -790,6 +790,12 @@ struct iwl_testmode_trace {
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dma_addr_t dma_addr;
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bool trace_enabled;
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};
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struct iwl_testmode_sram {
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u32 buff_size;
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u32 num_chunks;
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u8 *buff_addr;
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bool sram_readed;
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};
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#endif
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struct iwl_wipan_noa_data {
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@ -1070,6 +1076,7 @@ struct iwl_priv {
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bool led_registered;
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#ifdef CONFIG_IWLWIFI_DEVICE_SVTOOL
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struct iwl_testmode_trace testmode_trace;
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struct iwl_testmode_sram testmode_sram;
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u32 tm_fixed_rate;
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#endif
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@ -106,6 +106,10 @@ struct nla_policy iwl_testmode_gnl_msg_policy[IWL_TM_ATTR_MAX] = {
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[IWL_TM_ATTR_FIXRATE] = { .type = NLA_U32, },
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[IWL_TM_ATTR_UCODE_OWNER] = { .type = NLA_U8, },
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[IWL_TM_ATTR_SRAM_ADDR] = { .type = NLA_U32, },
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[IWL_TM_ATTR_SRAM_SIZE] = { .type = NLA_U32, },
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[IWL_TM_ATTR_SRAM_DUMP] = { .type = NLA_UNSPEC, },
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};
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/*
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@ -177,6 +181,18 @@ void iwl_testmode_init(struct iwl_priv *priv)
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{
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priv->pre_rx_handler = iwl_testmode_ucode_rx_pkt;
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priv->testmode_trace.trace_enabled = false;
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priv->testmode_sram.sram_readed = false;
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}
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void iwl_sram_cleanup(struct iwl_priv *priv)
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{
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if (priv->testmode_sram.sram_readed) {
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kfree(priv->testmode_sram.buff_addr);
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priv->testmode_sram.buff_addr = NULL;
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priv->testmode_sram.buff_size = 0;
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priv->testmode_sram.num_chunks = 0;
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priv->testmode_sram.sram_readed = false;
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}
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}
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static void iwl_trace_cleanup(struct iwl_priv *priv)
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@ -201,6 +217,7 @@ static void iwl_trace_cleanup(struct iwl_priv *priv)
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void iwl_testmode_cleanup(struct iwl_priv *priv)
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{
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iwl_trace_cleanup(priv);
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iwl_sram_cleanup(priv);
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}
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/*
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@ -644,6 +661,89 @@ static int iwl_testmode_ownership(struct ieee80211_hw *hw, struct nlattr **tb)
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return 0;
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}
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/*
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* This function handles the user application commands for SRAM data dump
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*
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* It retrieves the mandatory fields IWL_TM_ATTR_SRAM_ADDR and
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* IWL_TM_ATTR_SRAM_SIZE to decide the memory area for SRAM data reading
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*
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* Several error will be retured, -EBUSY if the SRAM data retrieved by
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* previous command has not been delivered to userspace, or -ENOMSG if
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* the mandatory fields (IWL_TM_ATTR_SRAM_ADDR,IWL_TM_ATTR_SRAM_SIZE)
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* are missing, or -ENOMEM if the buffer allocation fails.
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*
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* Otherwise 0 is replied indicating the success of the SRAM reading.
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*
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* @hw: ieee80211_hw object that represents the device
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* @tb: gnl message fields from the user space
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*/
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static int iwl_testmode_sram(struct ieee80211_hw *hw, struct nlattr **tb)
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{
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struct iwl_priv *priv = hw->priv;
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u32 base, ofs, size;
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if (priv->testmode_sram.sram_readed)
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return -EBUSY;
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if (!tb[IWL_TM_ATTR_SRAM_ADDR]) {
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IWL_DEBUG_INFO(priv, "Error finding SRAM offset address\n");
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return -ENOMSG;
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}
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ofs = nla_get_u32(tb[IWL_TM_ATTR_SRAM_ADDR]);
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if (!tb[IWL_TM_ATTR_SRAM_SIZE]) {
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IWL_DEBUG_INFO(priv, "Error finding size for SRAM reading\n");
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return -ENOMSG;
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}
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size = nla_get_u32(tb[IWL_TM_ATTR_SRAM_SIZE]);
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priv->testmode_sram.buff_size = (size / 4) * 4;
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priv->testmode_sram.buff_addr =
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kmalloc(priv->testmode_sram.buff_size, GFP_KERNEL);
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if (priv->testmode_sram.buff_addr == NULL) {
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IWL_DEBUG_INFO(priv, "Error allocating memory\n");
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return -ENOMEM;
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}
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base = 0x800000;
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_iwl_read_targ_mem_words(bus(priv), base + ofs,
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priv->testmode_sram.buff_addr,
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priv->testmode_sram.buff_size / 4);
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priv->testmode_sram.num_chunks =
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DIV_ROUND_UP(priv->testmode_sram.buff_size, TRACE_CHUNK_SIZE);
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priv->testmode_sram.sram_readed = true;
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return 0;
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}
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static int iwl_testmode_sram_dump(struct ieee80211_hw *hw, struct nlattr **tb,
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struct sk_buff *skb,
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struct netlink_callback *cb)
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{
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struct iwl_priv *priv = hw->priv;
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int idx, length;
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if (priv->testmode_sram.sram_readed) {
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idx = cb->args[4];
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if (idx >= priv->testmode_sram.num_chunks) {
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iwl_sram_cleanup(priv);
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return -ENOENT;
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}
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length = TRACE_CHUNK_SIZE;
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if (((idx + 1) == priv->testmode_sram.num_chunks) &&
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(priv->testmode_sram.buff_size % TRACE_CHUNK_SIZE))
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length = priv->testmode_sram.buff_size %
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TRACE_CHUNK_SIZE;
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NLA_PUT(skb, IWL_TM_ATTR_SRAM_DUMP, length,
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priv->testmode_sram.buff_addr +
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(TRACE_CHUNK_SIZE * idx));
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idx++;
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cb->args[4] = idx;
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return 0;
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} else
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return -EFAULT;
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nla_put_failure:
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return -ENOBUFS;
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}
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/* The testmode gnl message handler that takes the gnl message from the
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* user space and parses it per the policy iwl_testmode_gnl_msg_policy, then
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@ -721,6 +821,11 @@ int iwlagn_mac_testmode_cmd(struct ieee80211_hw *hw, void *data, int len)
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result = iwl_testmode_ownership(hw, tb);
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break;
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case IWL_TM_CMD_APP2DEV_READ_SRAM:
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IWL_DEBUG_INFO(priv, "testmode sram read cmd to driver\n");
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result = iwl_testmode_sram(hw, tb);
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break;
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default:
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IWL_DEBUG_INFO(priv, "Unknown testmode command\n");
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result = -ENOSYS;
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@ -769,6 +874,10 @@ int iwlagn_mac_testmode_dump(struct ieee80211_hw *hw, struct sk_buff *skb,
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IWL_DEBUG_INFO(priv, "uCode trace cmd to driver\n");
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result = iwl_testmode_trace_dump(hw, tb, skb, cb);
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break;
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case IWL_TM_CMD_APP2DEV_DUMP_SRAM:
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IWL_DEBUG_INFO(priv, "testmode sram dump cmd to driver\n");
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result = iwl_testmode_sram_dump(hw, tb, skb, cb);
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break;
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default:
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result = -EINVAL;
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break;
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@ -103,14 +103,20 @@
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* @IWL_TM_CMD_DEV2APP_EEPROM_RSP:
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* commands from kernel space to carry the eeprom response
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* to user application
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*
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* @IWL_TM_CMD_APP2DEV_OWNERSHIP:
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* commands from user application to own change the ownership of the uCode
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* if application has the ownership, the only host command from
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* testmode will deliver to uCode. Default owner is driver
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*
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* @IWL_TM_CMD_APP2DEV_INDIRECT_REG_READ32:
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* @IWL_TM_CMD_APP2DEV_INDIRECT_REG_WRITE32:
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* commands from user applicaiton to indirectly access peripheral register
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*
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* @IWL_TM_CMD_APP2DEV_READ_SRAM:
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* @IWL_TM_CMD_APP2DEV_DUMP_SRAM:
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* commands from user applicaiton to read data in sram
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*
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*/
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enum iwl_tm_cmd_t {
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IWL_TM_CMD_APP2DEV_UCODE = 1,
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@ -132,7 +138,9 @@ enum iwl_tm_cmd_t {
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IWL_TM_CMD_APP2DEV_OWNERSHIP = 17,
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IWL_TM_CMD_APP2DEV_INDIRECT_REG_READ32 = 18,
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IWL_TM_CMD_APP2DEV_INDIRECT_REG_WRITE32 = 19,
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IWL_TM_CMD_MAX = 20,
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IWL_TM_CMD_APP2DEV_READ_SRAM = 20,
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IWL_TM_CMD_APP2DEV_DUMP_SRAM = 21,
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IWL_TM_CMD_MAX = 22,
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};
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/*
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@ -202,6 +210,18 @@ enum iwl_tm_cmd_t {
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* When IWL_TM_ATTR_COMMAND is IWL_TM_CMD_APP2DEV_OWNERSHIP,
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* The mandatory fields are:
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* IWL_TM_ATTR_UCODE_OWNER for the new owner
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*
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* @IWL_TM_ATTR_SRAM_ADDR:
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* @IWL_TM_ATTR_SRAM_SIZE:
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* When IWL_TM_ATTR_COMMAND is IWL_TM_CMD_APP2DEV_READ_SRAM,
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* The mandatory fields are:
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* IWL_TM_ATTR_SRAM_ADDR for the address in sram
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* IWL_TM_ATTR_SRAM_SIZE for the buffer size of data reading
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*
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* @IWL_TM_ATTR_SRAM_DUMP:
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* When IWL_TM_ATTR_COMMAND is IWL_TM_CMD_APP2DEV_DUMP_SRAM,
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* IWL_TM_ATTR_SRAM_DUMP for the data in sram
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*
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*/
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enum iwl_tm_attr_t {
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IWL_TM_ATTR_NOT_APPLICABLE = 0,
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@ -219,7 +239,10 @@ enum iwl_tm_attr_t {
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IWL_TM_ATTR_TRACE_DUMP = 12,
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IWL_TM_ATTR_FIXRATE = 13,
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IWL_TM_ATTR_UCODE_OWNER = 14,
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IWL_TM_ATTR_MAX = 15,
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IWL_TM_ATTR_SRAM_ADDR = 15,
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IWL_TM_ATTR_SRAM_SIZE = 16,
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IWL_TM_ATTR_SRAM_DUMP = 17,
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IWL_TM_ATTR_MAX = 18,
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};
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/* uCode trace buffer */
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