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Renesas ARM64 Based SoC DT Updates for v5.2

Browse Source 
* R-Car Gen3 SoC based Salvator-X and Salvator-XS boards
   - Add GPIO keys support
   - Sort rwdt node alphabetically
 
 * R-Car H3 (r8a7795), M3-W (r8a7796) and M3-N (r8a77965) SoCs
   - Use extended audio DMAC register
 
 * R-Car M3-W (r8a7796) SoC
   - Remove unneeded sound #address/size-cells
 
 * R-Car M3-N (r8a77965) SoC
   - Add SSIU support for audio
 
 * R-Car E3 (r8a77990) and RZ/G2E (r8a774c0) SoCs
   - Remove invalid compatible value for CSI40
 
 * R-Car E3 (r8a77990) SoC
   - Cprrect SPDX license identifier style
 
 * R-Car E3 (r8a77990) based Ebisu board
   - Add BD9571 PMIC with DDR0 backup power config
   - Correct adv7482 hexadecimal register address
   - Add GPIO expander
 
 * R-Car E3 (r8a77990) based Ebisu and D3 (r8a77995) based Draak boards
   - Update bootargs to bring them into line with other R-Car Gen3 boards
   - Enable LVDS1 encoder
 
 * R-Car D3 (r8a77995) based Draak board
   - Correct EthernetAVB phy mode
   - Enable CAN0 and CAN1
 
 * RZ/G2E (r8a774c0) SoC
   - Add CANFD support
   - Correct CPU node style
 
 * RZ/G2E (r8a774c0) and RZ/G2M (r8a774a1) SoCs
   - Add clkp2 clock to CAN nodes
 
 * RZ/G2E (r8a774c0) based EK874 board
   - Add LED, CAN and RTC support
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Merge tag 'renesas-arm64-dt-for-v5.2' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into arm/dt

Renesas ARM64 Based SoC DT Updates for v5.2

* R-Car Gen3 SoC based Salvator-X and Salvator-XS boards
  - Add GPIO keys support
  - Sort rwdt node alphabetically

* R-Car H3 (r8a7795), M3-W (r8a7796) and M3-N (r8a77965) SoCs
  - Use extended audio DMAC register

* R-Car M3-W (r8a7796) SoC
  - Remove unneeded sound #address/size-cells

* R-Car M3-N (r8a77965) SoC
  - Add SSIU support for audio

* R-Car E3 (r8a77990) and RZ/G2E (r8a774c0) SoCs
  - Remove invalid compatible value for CSI40

* R-Car E3 (r8a77990) SoC
  - Cprrect SPDX license identifier style

* R-Car E3 (r8a77990) based Ebisu board
  - Add BD9571 PMIC with DDR0 backup power config
  - Correct adv7482 hexadecimal register address
  - Add GPIO expander

* R-Car E3 (r8a77990) based Ebisu and D3 (r8a77995) based Draak boards
  - Update bootargs to bring them into line with other R-Car Gen3 boards
  - Enable LVDS1 encoder

* R-Car D3 (r8a77995) based Draak board
  - Correct EthernetAVB phy mode
  - Enable CAN0 and CAN1

* RZ/G2E (r8a774c0) SoC
  - Add CANFD support
  - Correct CPU node style

* RZ/G2E (r8a774c0) and RZ/G2M (r8a774a1) SoCs
  - Add clkp2 clock to CAN nodes

* RZ/G2E (r8a774c0) based EK874 board
  - Add LED, CAN and RTC support

* tag 'renesas-arm64-dt-for-v5.2' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (26 commits)
  arm64: dts: renesas: salvator-common: Add GPIO keys support
  arm64: dts: renesas: use extended audio dmac register
  arm64: dts: renesas: r8a77995: draak: Fix EthernetAVB phy mode to rgmii
  arm64: dts: renesas: salvator-common: Sort node label
  arm64: dts: renesas: Update Ebisu and Draak bootargs
  arm64: dts: renesas: r8a774c0: Add clkp2 clock to CAN nodes
  arm64: dts: renesas: r8a774c0: Add CANFD support
  arm64: dts: renesas: r8a774a1: Add clkp2 clock to CAN nodes
  arm64: dts: renesas: ebisu: Add PMIC DDR0 Backup Power config
  arm64: dts: renesas: r8a77990-ebisu: Add BD9571 PMIC
  arm64: dts: renesas: r8a77990: Remove invalid compatible value for CSI40
  arm64: dts: renesas: r8a774c0: Remove invalid compatible value for CSI40
  arm64: dts: renesas: r8a77995: draak: Enable CAN0, CAN1
  arm64: dts: renesas: r8a774c0-cat874: Add RWDT support
  arm64: dts: renesas: ebisu: Enable VIN5
  arm64: dts: renesas: r8a774c0-cat874: Add LEDs support
  arm64: dts: renesas: r8a774c0-cat874: add RTC support
  arm64: dts: renesas: cat875: Add CAN support
  arm64: dts: renesas: r8a774c0: Fix cpu nodes style
  arm64: dts: renesas: r8a77965: add SSIU support for sound
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2019-04-28 12:16:26 -07:00
commit 2fe743c27f
13 changed files with 499 additions and 58 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

22
arch/arm64/boot/dts/renesas/cat875.dtsi
View File

@ -30,6 +30,18 @@ phy0: ethernet-phy@0 {
};
};
&can0 {
pinctrl-0 = <&can0_pins>;
pinctrl-names = "default";
status = "okay";
};
&can1 {
pinctrl-0 = <&can1_pins>;
pinctrl-names = "default";
status = "okay";
};
&pciec0 {
status = "okay";
};
@ -41,4 +53,14 @@ mux {
function = "avb";
};
};
can0_pins: can0 {
groups = "can0_data";
function = "can0";
};
can1_pins: can1 {
groups = "can1_data";
function = "can1";
};
};

12
arch/arm64/boot/dts/renesas/r8a774a1.dtsi
View File

@ -879,8 +879,10 @@ can0: can@e6c30000 {
"renesas,rcar-gen3-can";
reg = <0 0xe6c30000 0 0x1000>;
interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 916>, <&can_clk>;
clock-names = "clkp1", "can_clk";
clocks = <&cpg CPG_MOD 916>,
<&cpg CPG_CORE R8A774A1_CLK_CANFD>,
<&can_clk>;
clock-names = "clkp1", "clkp2", "can_clk";
power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
resets = <&cpg 916>;
status = "disabled";
@ -891,8 +893,10 @@ can1: can@e6c38000 {
"renesas,rcar-gen3-can";
reg = <0 0xe6c38000 0 0x1000>;
interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 915>, <&can_clk>;
clock-names = "clkp1", "can_clk";
clocks = <&cpg CPG_MOD 915>,
<&cpg CPG_CORE R8A774A1_CLK_CANFD>,
<&can_clk>;
clock-names = "clkp1", "clkp2", "can_clk";
power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
resets = <&cpg 915>;
status = "disabled";

47
arch/arm64/boot/dts/renesas/r8a774c0-cat874.dts
View File

@ -22,6 +22,30 @@ chosen {
stdout-path = "serial0:115200n8";
};
leds {
compatible = "gpio-leds";
led0 {
gpios = <&gpio5 19 GPIO_ACTIVE_HIGH>;
label = "LED0";
};
led1 {
gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
label = "LED1";
};
led2 {
gpios = <&gpio4 10 GPIO_ACTIVE_HIGH>;
label = "LED2";
};
led3 {
gpios = <&gpio6 4 GPIO_ACTIVE_HIGH>;
label = "LED3";
};
};
memory@48000000 {
device_type = "memory";
/* first 128MB is reserved for secure area. */
@ -56,6 +80,19 @@ &extal_clk {
clock-frequency = <48000000>;
};
&i2c1 {
pinctrl-0 = <&i2c1_pins>;
pinctrl-names = "default";
status = "okay";
clock-frequency = <400000>;
rtc@32 {
compatible = "epson,rx8571";
reg = <0x32>;
};
};
&pcie_bus_clk {
clock-frequency = <100000000>;
};
@ -66,6 +103,11 @@ &pciec0 {
};
&pfc {
i2c1_pins: i2c1 {
groups = "i2c1_b";
function = "i2c1";
};
scif2_pins: scif2 {
groups = "scif2_data_a";
function = "scif2";
@ -84,6 +126,11 @@ sdhi0_pins_uhs: sd0_uhs {
};
};
&rwdt {
timeout-sec = <60>;
status = "okay";
};
&scif2 {
pinctrl-0 = <&scif2_pins>;
pinctrl-names = "default";

44
arch/arm64/boot/dts/renesas/r8a774c0.dtsi
View File

@ -76,7 +76,7 @@ a53_0: cpu@0 {
power-domains = <&sysc R8A774C0_PD_CA53_CPU0>;
next-level-cache = <&L2_CA53>;
enable-method = "psci";
clocks =<&cpg CPG_CORE R8A774C0_CLK_Z2>;
clocks = <&cpg CPG_CORE R8A774C0_CLK_Z2>;
operating-points-v2 = <&cluster1_opp>;
};
@ -87,7 +87,7 @@ a53_1: cpu@1 {
power-domains = <&sysc R8A774C0_PD_CA53_CPU1>;
next-level-cache = <&L2_CA53>;
enable-method = "psci";
clocks =<&cpg CPG_CORE R8A774C0_CLK_Z2>;
clocks = <&cpg CPG_CORE R8A774C0_CLK_Z2>;
operating-points-v2 = <&cluster1_opp>;
};
@ -969,8 +969,10 @@ can0: can@e6c30000 {
"renesas,rcar-gen3-can";
reg = <0 0xe6c30000 0 0x1000>;
interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 916>, <&can_clk>;
clock-names = "clkp1", "can_clk";
clocks = <&cpg CPG_MOD 916>,
<&cpg CPG_CORE R8A774C0_CLK_CANFD>,
<&can_clk>;
clock-names = "clkp1", "clkp2", "can_clk";
power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
resets = <&cpg 916>;
status = "disabled";
@ -981,13 +983,40 @@ can1: can@e6c38000 {
"renesas,rcar-gen3-can";
reg = <0 0xe6c38000 0 0x1000>;
interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 915>, <&can_clk>;
clock-names = "clkp1", "can_clk";
clocks = <&cpg CPG_MOD 915>,
<&cpg CPG_CORE R8A774C0_CLK_CANFD>,
<&can_clk>;
clock-names = "clkp1", "clkp2", "can_clk";
power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
resets = <&cpg 915>;
status = "disabled";
};
canfd: can@e66c0000 {
compatible = "renesas,r8a774c0-canfd",
"renesas,rcar-gen3-canfd";
reg = <0 0xe66c0000 0 0x8000>;
interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 914>,
<&cpg CPG_CORE R8A774C0_CLK_CANFD>,
<&can_clk>;
clock-names = "fck", "canfd", "can_clk";
assigned-clocks = <&cpg CPG_CORE R8A774C0_CLK_CANFD>;
assigned-clock-rates = <40000000>;
power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
resets = <&cpg 914>;
status = "disabled";
channel0 {
status = "disabled";
};
channel1 {
status = "disabled";
};
};
pwm0: pwm@e6e30000 {
compatible = "renesas,pwm-r8a774c0", "renesas,pwm-rcar";
reg = <0 0xe6e30000 0 0x8>;
@ -1740,8 +1769,7 @@ fcpvd1: fcp@fea2f000 {
};
csi40: csi2@feaa0000 {
compatible = "renesas,r8a774c0-csi2",
"renesas,rcar-gen3-csi2";
compatible = "renesas,r8a774c0-csi2";
reg = <0 0xfeaa0000 0 0x10000>;
interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 716>;

2
arch/arm64/boot/dts/renesas/r8a7795.dtsi
View File

@ -1836,7 +1836,7 @@ rcar_sound: sound@ec500000 {
<0 0xec5a0000 0 0x100>, /* ADG */
<0 0xec540000 0 0x1000>, /* SSIU */
<0 0xec541000 0 0x280>, /* SSI */
<0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
<0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/
reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
clocks = <&cpg CPG_MOD 1005>,

1
arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts
View File

@ -68,6 +68,7 @@ &rcar_sound {
ports {
/* rsnd_port0 is on salvator-common */
rsnd_port1: port@1 {
reg = <1>;
rsnd_endpoint1: endpoint {
remote-endpoint = <&dw_hdmi0_snd_in>;

1
arch/arm64/boot/dts/renesas/r8a7796-salvator-xs.dts
View File

@ -68,6 +68,7 @@ &rcar_sound {
ports {
/* rsnd_port0 is on salvator-common */
rsnd_port1: port@1 {
reg = <1>;
rsnd_endpoint1: endpoint {
remote-endpoint = <&dw_hdmi0_snd_in>;

13
arch/arm64/boot/dts/renesas/r8a7796.dtsi
View File

@ -1775,7 +1775,7 @@ rcar_sound: sound@ec500000 {
<0 0xec5a0000 0 0x100>, /* ADG */
<0 0xec540000 0 0x1000>, /* SSIU */
<0 0xec541000 0 0x280>, /* SSI */
<0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
<0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/
reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
clocks = <&cpg CPG_MOD 1005>,
@ -2162,17 +2162,6 @@ ssi9: ssi-9 {
dma-names = "rx", "tx";
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
};
port@1 {
reg = <1>;
};
};
};
audma0: dma-controller@ec700000 {

253
arch/arm64/boot/dts/renesas/r8a77965.dtsi
View File

@ -1461,7 +1461,7 @@ rcar_sound: sound@ec500000 {
<0 0xec5a0000 0 0x100>, /* ADG */
<0 0xec540000 0 0x1000>, /* SSIU */
<0 0xec541000 0 0x280>, /* SSI */
<0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
<0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/
reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
clocks = <&cpg CPG_MOD 1005>,
@ -1585,56 +1585,267 @@ src9: src-9 {
};
};
rcar_sound,ssiu {
ssiu00: ssiu-0 {
dmas = <&audma0 0x15>, <&audma1 0x16>;
dma-names = "rx", "tx";
};
ssiu01: ssiu-1 {
dmas = <&audma0 0x35>, <&audma1 0x36>;
dma-names = "rx", "tx";
};
ssiu02: ssiu-2 {
dmas = <&audma0 0x37>, <&audma1 0x38>;
dma-names = "rx", "tx";
};
ssiu03: ssiu-3 {
dmas = <&audma0 0x47>, <&audma1 0x48>;
dma-names = "rx", "tx";
};
ssiu04: ssiu-4 {
dmas = <&audma0 0x3F>, <&audma1 0x40>;
dma-names = "rx", "tx";
};
ssiu05: ssiu-5 {
dmas = <&audma0 0x43>, <&audma1 0x44>;
dma-names = "rx", "tx";
};
ssiu06: ssiu-6 {
dmas = <&audma0 0x4F>, <&audma1 0x50>;
dma-names = "rx", "tx";
};
ssiu07: ssiu-7 {
dmas = <&audma0 0x53>, <&audma1 0x54>;
dma-names = "rx", "tx";
};
ssiu10: ssiu-8 {
dmas = <&audma0 0x49>, <&audma1 0x4a>;
dma-names = "rx", "tx";
};
ssiu11: ssiu-9 {
dmas = <&audma0 0x4B>, <&audma1 0x4C>;
dma-names = "rx", "tx";
};
ssiu12: ssiu-10 {
dmas = <&audma0 0x57>, <&audma1 0x58>;
dma-names = "rx", "tx";
};
ssiu13: ssiu-11 {
dmas = <&audma0 0x59>, <&audma1 0x5A>;
dma-names = "rx", "tx";
};
ssiu14: ssiu-12 {
dmas = <&audma0 0x5F>, <&audma1 0x60>;
dma-names = "rx", "tx";
};
ssiu15: ssiu-13 {
dmas = <&audma0 0xC3>, <&audma1 0xC4>;
dma-names = "rx", "tx";
};
ssiu16: ssiu-14 {
dmas = <&audma0 0xC7>, <&audma1 0xC8>;
dma-names = "rx", "tx";
};
ssiu17: ssiu-15 {
dmas = <&audma0 0xCB>, <&audma1 0xCC>;
dma-names = "rx", "tx";
};
ssiu20: ssiu-16 {
dmas = <&audma0 0x63>, <&audma1 0x64>;
dma-names = "rx", "tx";
};
ssiu21: ssiu-17 {
dmas = <&audma0 0x67>, <&audma1 0x68>;
dma-names = "rx", "tx";
};
ssiu22: ssiu-18 {
dmas = <&audma0 0x6B>, <&audma1 0x6C>;
dma-names = "rx", "tx";
};
ssiu23: ssiu-19 {
dmas = <&audma0 0x6D>, <&audma1 0x6E>;
dma-names = "rx", "tx";
};
ssiu24: ssiu-20 {
dmas = <&audma0 0xCF>, <&audma1 0xCE>;
dma-names = "rx", "tx";
};
ssiu25: ssiu-21 {
dmas = <&audma0 0xEB>, <&audma1 0xEC>;
dma-names = "rx", "tx";
};
ssiu26: ssiu-22 {
dmas = <&audma0 0xED>, <&audma1 0xEE>;
dma-names = "rx", "tx";
};
ssiu27: ssiu-23 {
dmas = <&audma0 0xEF>, <&audma1 0xF0>;
dma-names = "rx", "tx";
};
ssiu30: ssiu-24 {
dmas = <&audma0 0x6f>, <&audma1 0x70>;
dma-names = "rx", "tx";
};
ssiu31: ssiu-25 {
dmas = <&audma0 0x21>, <&audma1 0x22>;
dma-names = "rx", "tx";
};
ssiu32: ssiu-26 {
dmas = <&audma0 0x23>, <&audma1 0x24>;
dma-names = "rx", "tx";
};
ssiu33: ssiu-27 {
dmas = <&audma0 0x25>, <&audma1 0x26>;
dma-names = "rx", "tx";
};
ssiu34: ssiu-28 {
dmas = <&audma0 0x27>, <&audma1 0x28>;
dma-names = "rx", "tx";
};
ssiu35: ssiu-29 {
dmas = <&audma0 0x29>, <&audma1 0x2A>;
dma-names = "rx", "tx";
};
ssiu36: ssiu-30 {
dmas = <&audma0 0x2B>, <&audma1 0x2C>;
dma-names = "rx", "tx";
};
ssiu37: ssiu-31 {
dmas = <&audma0 0x2D>, <&audma1 0x2E>;
dma-names = "rx", "tx";
};
ssiu40: ssiu-32 {
dmas = <&audma0 0x71>, <&audma1 0x72>;
dma-names = "rx", "tx";
};
ssiu41: ssiu-33 {
dmas = <&audma0 0x17>, <&audma1 0x18>;
dma-names = "rx", "tx";
};
ssiu42: ssiu-34 {
dmas = <&audma0 0x19>, <&audma1 0x1A>;
dma-names = "rx", "tx";
};
ssiu43: ssiu-35 {
dmas = <&audma0 0x1B>, <&audma1 0x1C>;
dma-names = "rx", "tx";
};
ssiu44: ssiu-36 {
dmas = <&audma0 0x1D>, <&audma1 0x1E>;
dma-names = "rx", "tx";
};
ssiu45: ssiu-37 {
dmas = <&audma0 0x1F>, <&audma1 0x20>;
dma-names = "rx", "tx";
};
ssiu46: ssiu-38 {
dmas = <&audma0 0x31>, <&audma1 0x32>;
dma-names = "rx", "tx";
};
ssiu47: ssiu-39 {
dmas = <&audma0 0x33>, <&audma1 0x34>;
dma-names = "rx", "tx";
};
ssiu50: ssiu-40 {
dmas = <&audma0 0x73>, <&audma1 0x74>;
dma-names = "rx", "tx";
};
ssiu60: ssiu-41 {
dmas = <&audma0 0x75>, <&audma1 0x76>;
dma-names = "rx", "tx";
};
ssiu70: ssiu-42 {
dmas = <&audma0 0x79>, <&audma1 0x7a>;
dma-names = "rx", "tx";
};
ssiu80: ssiu-43 {
dmas = <&audma0 0x7b>, <&audma1 0x7c>;
dma-names = "rx", "tx";
};
ssiu90: ssiu-44 {
dmas = <&audma0 0x7d>, <&audma1 0x7e>;
dma-names = "rx", "tx";
};
ssiu91: ssiu-45 {
dmas = <&audma0 0x7F>, <&audma1 0x80>;
dma-names = "rx", "tx";
};
ssiu92: ssiu-46 {
dmas = <&audma0 0x81>, <&audma1 0x82>;
dma-names = "rx", "tx";
};
ssiu93: ssiu-47 {
dmas = <&audma0 0x83>, <&audma1 0x84>;
dma-names = "rx", "tx";
};
ssiu94: ssiu-48 {
dmas = <&audma0 0xA3>, <&audma1 0xA4>;
dma-names = "rx", "tx";
};
ssiu95: ssiu-49 {
dmas = <&audma0 0xA5>, <&audma1 0xA6>;
dma-names = "rx", "tx";
};
ssiu96: ssiu-50 {
dmas = <&audma0 0xA7>, <&audma1 0xA8>;
dma-names = "rx", "tx";
};
ssiu97: ssiu-51 {
dmas = <&audma0 0xA9>, <&audma1 0xAA>;
dma-names = "rx", "tx";
};
};
rcar_sound,ssi {
ssi0: ssi-0 {
interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
dma-names = "rx", "tx", "rxu", "txu";
dmas = <&audma0 0x01>, <&audma1 0x02>;
dma-names = "rx", "tx";
};
ssi1: ssi-1 {
interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
dma-names = "rx", "tx", "rxu", "txu";
dmas = <&audma0 0x03>, <&audma1 0x04>;
dma-names = "rx", "tx";
};
ssi2: ssi-2 {
interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
dma-names = "rx", "tx", "rxu", "txu";
dmas = <&audma0 0x05>, <&audma1 0x06>;
dma-names = "rx", "tx";
};
ssi3: ssi-3 {
interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
dma-names = "rx", "tx", "rxu", "txu";
dmas = <&audma0 0x07>, <&audma1 0x08>;
dma-names = "rx", "tx";
};
ssi4: ssi-4 {
interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
dma-names = "rx", "tx", "rxu", "txu";
dmas = <&audma0 0x09>, <&audma1 0x0a>;
dma-names = "rx", "tx";
};
ssi5: ssi-5 {
interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
dma-names = "rx", "tx", "rxu", "txu";
dmas = <&audma0 0x0b>, <&audma1 0x0c>;
dma-names = "rx", "tx";
};
ssi6: ssi-6 {
interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
dma-names = "rx", "tx", "rxu", "txu";
dmas = <&audma0 0x0d>, <&audma1 0x0e>;
dma-names = "rx", "tx";
};
ssi7: ssi-7 {
interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
dma-names = "rx", "tx", "rxu", "txu";
dmas = <&audma0 0x0f>, <&audma1 0x10>;
dma-names = "rx", "tx";
};
ssi8: ssi-8 {
interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
dma-names = "rx", "tx", "rxu", "txu";
dmas = <&audma0 0x11>, <&audma1 0x12>;
dma-names = "rx", "tx";
};
ssi9: ssi-9 {
interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
dma-names = "rx", "tx", "rxu", "txu";
dmas = <&audma0 0x13>, <&audma1 0x14>;
dma-names = "rx", "tx";
};
};
};

53
arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts
View File

@ -1,4 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0 */
// SPDX-License-Identifier: GPL-2.0
/*
* Device Tree Source for the ebisu board
*
@ -19,7 +19,7 @@ aliases {
};
chosen {
bootargs = "ignore_loglevel";
bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
stdout-path = "serial0:115200n8";
};
@ -337,6 +337,15 @@ &hsusb {
&i2c0 {
status = "okay";
io_expander: gpio@20 {
compatible = "onnn,pca9654";
reg = <0x20>;
gpio-controller;
#gpio-cells = <2>;
interrupt-parent = <&gpio2>;
interrupts = <22 IRQ_TYPE_LEVEL_LOW>;
};
hdmi-encoder@39 {
compatible = "adi,adv7511w";
reg = <0x39>;
@ -398,7 +407,7 @@ adv7482_hdmi: endpoint {
};
port@a {
reg = <0xa>;
reg = <10>;
adv7482_txa: endpoint {
clock-lanes = <0>;
@ -440,6 +449,28 @@ cs2000: clk-multiplier@4f {
};
};
&i2c_dvfs {
status = "okay";
clock-frequency = <400000>;
pmic: pmic@30 {
pinctrl-0 = <&irq0_pins>;
pinctrl-names = "default";
compatible = "rohm,bd9571mwv";
reg = <0x30>;
interrupt-parent = <&intc_ex>;
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
interrupt-controller;
#interrupt-cells = <2>;
gpio-controller;
#gpio-cells = <2>;
rohm,ddr-backup-power = <0x1>;
rohm,rstbmode-level;
};
};
&lvds0 {
status = "okay";
@ -458,6 +489,13 @@ lvds0_out: endpoint {
};
&lvds1 {
/*
* Even though the LVDS1 output is not connected, the encoder must be
* enabled to supply a pixel clock to the DU for the DPAD output when
* LVDS0 is in use.
*/
status = "okay";
clocks = <&cpg CPG_MOD 727>,
<&x13_clk>,
<&extal_clk>;
@ -495,6 +533,11 @@ du_pins: du {
function = "du";
};
irq0_pins: irq0 {
groups = "intc_ex_irq0";
function = "intc_ex";
};
pwm3_pins: pwm3 {
groups = "pwm3_b";
function = "pwm3";
@ -650,6 +693,10 @@ &vin4 {
status = "okay";
};
&vin5 {
status = "okay";
};
&xhci0 {
pinctrl-0 = <&usb30_pins>;
pinctrl-names = "default";

4
arch/arm64/boot/dts/renesas/r8a77990.dtsi
View File

@ -1,4 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0 */
// SPDX-License-Identifier: GPL-2.0
/*
* Device Tree Source for the R-Car E3 (R8A77990) SoC
*
@ -1656,7 +1656,7 @@ fcpvd1: fcp@fea2f000 {
};
csi40: csi2@feaa0000 {
compatible = "renesas,r8a77990-csi2", "renesas,rcar-gen3-csi2";
compatible = "renesas,r8a77990-csi2";
reg = <0 0xfeaa0000 0 0x10000>;
interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 716>;

32
arch/arm64/boot/dts/renesas/r8a77995-draak.dts
View File

@ -20,7 +20,7 @@ aliases {
};
chosen {
bootargs = "ignore_loglevel";
bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
stdout-path = "serial0:115200n8";
};
@ -168,7 +168,6 @@ &avb {
pinctrl-names = "default";
renesas,no-ether-link;
phy-handle = <&phy0>;
phy-mode = "rgmii-txid";
status = "okay";
phy0: ethernet-phy@0 {
@ -179,6 +178,18 @@ phy0: ethernet-phy@0 {
};
};
&can0 {
pinctrl-0 = <&can0_pins>;
pinctrl-names = "default";
status = "okay";
};
&can1 {
pinctrl-0 = <&can1_pins>;
pinctrl-names = "default";
status = "okay";
};
&du {
pinctrl-0 = <&du_pins>;
pinctrl-names = "default";
@ -356,6 +367,13 @@ lvds0_out: endpoint {
};
&lvds1 {
/*
* Even though the LVDS1 output is not connected, the encoder must be
* enabled to supply a pixel clock to the DU for the DPAD output when
* LVDS0 is in use.
*/
status = "okay";
clocks = <&cpg CPG_MOD 727>,
<&x12_clk>,
<&extal_clk>;
@ -375,6 +393,16 @@ mux {
};
};
can0_pins: can0 {
groups = "can0_data_a";
function = "can0";
};
can1_pins: can1 {
groups = "can1_data_a";
function = "can1";
};
du_pins: du {
groups = "du_rgb888", "du_sync", "du_disp", "du_clk_out_0";
function = "du";

73
arch/arm64/boot/dts/renesas/salvator-common.dtsi
View File

@ -29,6 +29,7 @@
*/
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
aliases {
@ -86,6 +87,63 @@ hdmi_in_con: endpoint {
};
};
keys {
compatible = "gpio-keys";
pinctrl-0 = <&keys_pins>;
pinctrl-names = "default";
key-1 {
gpios = <&gpio5 17 GPIO_ACTIVE_LOW>;
linux,code = <KEY_1>;
label = "SW4-1";
wakeup-source;
debounce-interval = <20>;
};
key-2 {
gpios = <&gpio5 20 GPIO_ACTIVE_LOW>;
linux,code = <KEY_2>;
label = "SW4-2";
wakeup-source;
debounce-interval = <20>;
};
key-3 {
gpios = <&gpio5 22 GPIO_ACTIVE_LOW>;
linux,code = <KEY_3>;
label = "SW4-3";
wakeup-source;
debounce-interval = <20>;
};
key-4 {
gpios = <&gpio5 23 GPIO_ACTIVE_LOW>;
linux,code = <KEY_4>;
label = "SW4-4";
wakeup-source;
debounce-interval = <20>;
};
key-a {
gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
linux,code = <KEY_A>;
label = "TSW0";
wakeup-source;
debounce-interval = <20>;
};
key-b {
gpios = <&gpio6 12 GPIO_ACTIVE_LOW>;
linux,code = <KEY_B>;
label = "TSW1";
wakeup-source;
debounce-interval = <20>;
};
key-c {
gpios = <&gpio6 13 GPIO_ACTIVE_LOW>;
linux,code = <KEY_C>;
label = "TSW2";
wakeup-source;
debounce-interval = <20>;
};
};
reg_1p8v: regulator0 {
compatible = "regulator-fixed";
regulator-name = "fixed-1.8V";
@ -572,6 +630,11 @@ irq0_pins: irq0 {
function = "intc_ex";
};
keys_pins: keys {
pins = "GP_5_17", "GP_5_20", "GP_5_22";
bias-pull-up;
};
pwm1_pins: pwm1 {
groups = "pwm1_a";
function = "pwm1";
@ -719,6 +782,11 @@ rsnd_endpoint0: endpoint {
};
};
&rwdt {
timeout-sec = <60>;
status = "okay";
};
&scif1 {
pinctrl-0 = <&scif1_pins>;
pinctrl-names = "default";
@ -857,11 +925,6 @@ &vin7 {
status = "okay";
};
&rwdt {
timeout-sec = <60>;
status = "okay";
};
&xhci0 {
pinctrl-0 = <&usb30_pins>;
pinctrl-names = "default";