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dt-bindings: snps,dw-apb-ssi: Add optional clock bindings documentation
Add documentation to the Synopsys SPI dt-bindings to support an optional interface clock that may be used for register access. Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com> Signed-off-by: Gareth Williams <gareth.williams.jx@renesas.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -8,9 +8,15 @@ Required properties:
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- interrupts : One interrupt, used by the controller.
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- #address-cells : <1>, as required by generic SPI binding.
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- #size-cells : <0>, also as required by generic SPI binding.
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- clocks : phandle for the core clock used to generate the external SPI clock.
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- clocks : phandles for the clocks, see the description of clock-names below.
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The phandle for the "ssi_clk" is required. The phandle for the "pclk" clock
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is optional. If a single clock is specified but no clock-name, it is the
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"ssi_clk" clock. If both clocks are listed, the "ssi_clk" must be first.
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Optional properties:
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- clock-names : Contains the names of the clocks:
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"ssi_clk", for the core clock used to generate the external SPI clock.
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"pclk", the interface clock, required for register access.
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- cs-gpios : Specifies the gpio pins to be used for chipselects.
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- num-cs : The number of chipselects. If omitted, this will default to 4.
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- reg-io-width : The I/O register width (in bytes) implemented by this
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