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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2025-01-26 23:19:23 +07:00
crypto: ccree - clean up clock handling
Use devm_clk_get_optional() instead of devm_clk_get() and explicit optional clock handling. As clk_prepare_enable() and clk_disable_unprepare() handle optional clocks fine, the cc_clk_on() and cc_clk_off() wrappers can be removed. While at it, use the new "%pe" format specifier to print error codes. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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@ -302,22 +302,12 @@ static int init_cc_resources(struct platform_device *plat_dev)
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platform_set_drvdata(plat_dev, new_drvdata);
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new_drvdata->plat_dev = plat_dev;
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clk = devm_clk_get(dev, NULL);
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if (IS_ERR(clk))
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switch (PTR_ERR(clk)) {
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/* Clock is optional so this might be fine */
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case -ENOENT:
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break;
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/* Clock not available, let's try again soon */
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case -EPROBE_DEFER:
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return -EPROBE_DEFER;
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default:
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dev_err(dev, "Error getting clock: %ld\n",
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PTR_ERR(clk));
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return PTR_ERR(clk);
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}
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clk = devm_clk_get_optional(dev, NULL);
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if (IS_ERR(clk)) {
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if (PTR_ERR(clk) != -EPROBE_DEFER)
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dev_err(dev, "Error getting clock: %pe\n", clk);
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return PTR_ERR(clk);
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}
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new_drvdata->clk = clk;
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new_drvdata->coherent = of_dma_is_coherent(np);
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@ -362,7 +352,7 @@ static int init_cc_resources(struct platform_device *plat_dev)
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return rc;
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}
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rc = cc_clk_on(new_drvdata);
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rc = clk_prepare_enable(new_drvdata->clk);
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if (rc) {
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dev_err(dev, "Failed to enable clock");
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return rc;
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@ -545,7 +535,7 @@ static int init_cc_resources(struct platform_device *plat_dev)
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post_regs_err:
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fini_cc_regs(new_drvdata);
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post_clk_err:
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cc_clk_off(new_drvdata);
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clk_disable_unprepare(new_drvdata->clk);
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return rc;
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}
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@ -569,23 +559,7 @@ static void cleanup_cc_resources(struct platform_device *plat_dev)
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cc_fips_fini(drvdata);
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cc_debugfs_fini(drvdata);
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fini_cc_regs(drvdata);
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cc_clk_off(drvdata);
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}
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int cc_clk_on(struct cc_drvdata *drvdata)
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{
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struct clk *clk = drvdata->clk;
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int rc;
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if (IS_ERR(clk))
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/* Not all devices have a clock associated with CCREE */
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return 0;
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rc = clk_prepare_enable(clk);
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if (rc)
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return rc;
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return 0;
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clk_disable_unprepare(drvdata->clk);
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}
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unsigned int cc_get_default_hash_len(struct cc_drvdata *drvdata)
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@ -596,17 +570,6 @@ unsigned int cc_get_default_hash_len(struct cc_drvdata *drvdata)
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return HASH_LEN_SIZE_630;
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}
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void cc_clk_off(struct cc_drvdata *drvdata)
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{
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struct clk *clk = drvdata->clk;
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if (IS_ERR(clk))
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/* Not all devices have a clock associated with CCREE */
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return;
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clk_disable_unprepare(clk);
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}
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static int ccree_probe(struct platform_device *plat_dev)
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{
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int rc;
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@ -212,8 +212,6 @@ static inline void dump_byte_array(const char *name, const u8 *the_array,
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bool cc_wait_for_reset_completion(struct cc_drvdata *drvdata);
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int init_cc_regs(struct cc_drvdata *drvdata, bool is_probe);
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void fini_cc_regs(struct cc_drvdata *drvdata);
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int cc_clk_on(struct cc_drvdata *drvdata);
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void cc_clk_off(struct cc_drvdata *drvdata);
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unsigned int cc_get_default_hash_len(struct cc_drvdata *drvdata);
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static inline void cc_iowrite(struct cc_drvdata *drvdata, u32 reg, u32 val)
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@ -26,7 +26,7 @@ int cc_pm_suspend(struct device *dev)
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dev_dbg(dev, "set HOST_POWER_DOWN_EN\n");
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fini_cc_regs(drvdata);
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cc_iowrite(drvdata, CC_REG(HOST_POWER_DOWN_EN), POWER_DOWN_ENABLE);
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cc_clk_off(drvdata);
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clk_disable_unprepare(drvdata->clk);
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return 0;
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}
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@ -37,7 +37,7 @@ int cc_pm_resume(struct device *dev)
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dev_dbg(dev, "unset HOST_POWER_DOWN_EN\n");
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/* Enables the device source clk */
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rc = cc_clk_on(drvdata);
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rc = clk_prepare_enable(drvdata->clk);
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if (rc) {
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dev_err(dev, "failed getting clock back on. We're toast.\n");
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return rc;
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