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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-29 22:36:48 +07:00
ARM: Fix ptrace accesses
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
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bf32eb8549
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2ef7f3dbd7
@ -316,12 +316,8 @@ static inline void outer_flush_range(unsigned long start, unsigned long end)
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* processes address space. Really, we want to allow our "user
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* processes address space. Really, we want to allow our "user
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* space" model to handle this.
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* space" model to handle this.
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*/
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*/
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#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
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extern void copy_to_user_page(struct vm_area_struct *, struct page *,
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do { \
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unsigned long, void *, const void *, unsigned long);
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memcpy(dst, src, len); \
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flush_ptrace_access(vma, page, vaddr, dst, len, 1);\
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} while (0)
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#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
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#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
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do { \
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do { \
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memcpy(dst, src, len); \
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memcpy(dst, src, len); \
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@ -355,17 +351,6 @@ vivt_flush_cache_page(struct vm_area_struct *vma, unsigned long user_addr, unsig
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}
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}
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}
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}
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static inline void
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vivt_flush_ptrace_access(struct vm_area_struct *vma, struct page *page,
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unsigned long uaddr, void *kaddr,
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unsigned long len, int write)
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{
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if (cpumask_test_cpu(smp_processor_id(), mm_cpumask(vma->vm_mm))) {
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unsigned long addr = (unsigned long)kaddr;
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__cpuc_coherent_kern_range(addr, addr + len);
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}
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}
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#ifndef CONFIG_CPU_CACHE_VIPT
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#ifndef CONFIG_CPU_CACHE_VIPT
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#define flush_cache_mm(mm) \
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#define flush_cache_mm(mm) \
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vivt_flush_cache_mm(mm)
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vivt_flush_cache_mm(mm)
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@ -373,15 +358,10 @@ vivt_flush_ptrace_access(struct vm_area_struct *vma, struct page *page,
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vivt_flush_cache_range(vma,start,end)
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vivt_flush_cache_range(vma,start,end)
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#define flush_cache_page(vma,addr,pfn) \
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#define flush_cache_page(vma,addr,pfn) \
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vivt_flush_cache_page(vma,addr,pfn)
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vivt_flush_cache_page(vma,addr,pfn)
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#define flush_ptrace_access(vma,page,ua,ka,len,write) \
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vivt_flush_ptrace_access(vma,page,ua,ka,len,write)
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#else
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#else
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extern void flush_cache_mm(struct mm_struct *mm);
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extern void flush_cache_mm(struct mm_struct *mm);
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extern void flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned long end);
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extern void flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned long end);
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extern void flush_cache_page(struct vm_area_struct *vma, unsigned long user_addr, unsigned long pfn);
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extern void flush_cache_page(struct vm_area_struct *vma, unsigned long user_addr, unsigned long pfn);
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extern void flush_ptrace_access(struct vm_area_struct *vma, struct page *page,
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unsigned long uaddr, void *kaddr,
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unsigned long len, int write);
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#endif
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#endif
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#define flush_cache_dup_mm(mm) flush_cache_mm(mm)
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#define flush_cache_dup_mm(mm) flush_cache_mm(mm)
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@ -13,4 +13,9 @@ static inline int tlb_ops_need_broadcast(void)
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return ((read_cpuid_ext(CPUID_EXT_MMFR3) >> 12) & 0xf) < 2;
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return ((read_cpuid_ext(CPUID_EXT_MMFR3) >> 12) & 0xf) < 2;
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}
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}
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static inline int cache_ops_need_broadcast(void)
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{
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return ((read_cpuid_ext(CPUID_EXT_MMFR3) >> 12) & 0xf) < 1;
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}
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#endif
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#endif
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@ -13,6 +13,7 @@
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#include <asm/cacheflush.h>
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#include <asm/cacheflush.h>
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#include <asm/cachetype.h>
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#include <asm/cachetype.h>
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#include <asm/smp_plat.h>
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#include <asm/system.h>
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#include <asm/system.h>
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#include <asm/tlbflush.h>
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#include <asm/tlbflush.h>
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@ -87,13 +88,26 @@ void flush_cache_page(struct vm_area_struct *vma, unsigned long user_addr, unsig
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if (vma->vm_flags & VM_EXEC && icache_is_vivt_asid_tagged())
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if (vma->vm_flags & VM_EXEC && icache_is_vivt_asid_tagged())
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__flush_icache_all();
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__flush_icache_all();
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}
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}
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#else
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#define flush_pfn_alias(pfn,vaddr) do { } while (0)
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#endif
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#ifdef CONFIG_SMP
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static void flush_ptrace_access_other(void *args)
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{
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__flush_icache_all();
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}
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#endif
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static
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void flush_ptrace_access(struct vm_area_struct *vma, struct page *page,
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void flush_ptrace_access(struct vm_area_struct *vma, struct page *page,
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unsigned long uaddr, void *kaddr,
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unsigned long uaddr, void *kaddr, unsigned long len)
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unsigned long len, int write)
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{
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{
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if (cache_is_vivt()) {
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if (cache_is_vivt()) {
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vivt_flush_ptrace_access(vma, page, uaddr, kaddr, len, write);
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if (cpumask_test_cpu(smp_processor_id(), mm_cpumask(vma->vm_mm))) {
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unsigned long addr = (unsigned long)kaddr;
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__cpuc_coherent_kern_range(addr, addr + len);
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}
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return;
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return;
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}
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}
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@ -104,16 +118,37 @@ void flush_ptrace_access(struct vm_area_struct *vma, struct page *page,
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}
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}
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/* VIPT non-aliasing cache */
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/* VIPT non-aliasing cache */
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if (cpumask_test_cpu(smp_processor_id(), mm_cpumask(vma->vm_mm)) &&
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if (vma->vm_flags & VM_EXEC) {
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vma->vm_flags & VM_EXEC) {
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unsigned long addr = (unsigned long)kaddr;
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unsigned long addr = (unsigned long)kaddr;
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/* only flushing the kernel mapping on non-aliasing VIPT */
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__cpuc_coherent_kern_range(addr, addr + len);
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__cpuc_coherent_kern_range(addr, addr + len);
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#ifdef CONFIG_SMP
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if (cache_ops_need_broadcast())
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smp_call_function(flush_ptrace_access_other,
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NULL, 1);
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#endif
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}
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}
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}
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}
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#else
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#define flush_pfn_alias(pfn,vaddr) do { } while (0)
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/*
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* Copy user data from/to a page which is mapped into a different
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* processes address space. Really, we want to allow our "user
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* space" model to handle this.
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*
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* Note that this code needs to run on the current CPU.
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*/
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void copy_to_user_page(struct vm_area_struct *vma, struct page *page,
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unsigned long uaddr, void *dst, const void *src,
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unsigned long len)
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{
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#ifdef CONFIG_SMP
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preempt_disable();
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#endif
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#endif
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memcpy(dst, src, len);
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flush_ptrace_access(vma, page, uaddr, dst, len);
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#ifdef CONFIG_SMP
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preempt_enable();
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#endif
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}
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void __flush_dcache_page(struct address_space *mapping, struct page *page)
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void __flush_dcache_page(struct address_space *mapping, struct page *page)
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{
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{
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