mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-05 05:16:43 +07:00
usb: dwc3: gadget: add a pointer to endpoint registers
By adding a pointer to endpoint registers' base address, we can avoid using our controller-wide struct dwc3 pointer for everything. At some point this will allow us to have per-endpoint locks which will, in turn, let us queue requests to separate endpoints in parallel. Because of this change our debugfs interface and io accessors need to be changed accordingly. Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
This commit is contained in:
Felipe Balbi
parent
2cd4718d0b
commit
2eb8801650
@ -138,10 +138,12 @@
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#define DWC3_DGCMDPAR 0xc710
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#define DWC3_DGCMD 0xc714
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#define DWC3_DALEPENA 0xc720
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#define DWC3_DEPCMDPAR2(n) (0xc800 + (n * 0x10))
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#define DWC3_DEPCMDPAR1(n) (0xc804 + (n * 0x10))
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#define DWC3_DEPCMDPAR0(n) (0xc808 + (n * 0x10))
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#define DWC3_DEPCMD(n) (0xc80c + (n * 0x10))
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#define DWC3_DEP_BASE(n) (0xc800 + (n * 0x10))
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#define DWC3_DEPCMDPAR2 0x00
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#define DWC3_DEPCMDPAR1 0x04
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#define DWC3_DEPCMDPAR0 0x08
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#define DWC3_DEPCMD 0x0c
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/* OTG Registers */
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#define DWC3_OCFG 0xcc00
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@ -480,6 +482,7 @@ struct dwc3_event_buffer {
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* @endpoint: usb endpoint
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* @pending_list: list of pending requests for this endpoint
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* @started_list: list of started requests on this endpoint
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* @regs: pointer to first endpoint register
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* @trb_pool: array of transaction buffers
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* @trb_pool_dma: dma address of @trb_pool
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* @trb_enqueue: enqueue 'pointer' into TRB array
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@ -501,6 +504,8 @@ struct dwc3_ep {
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struct list_head pending_list;
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struct list_head started_list;
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void __iomem *regs;
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struct dwc3_trb *trb_pool;
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dma_addr_t trb_pool_dma;
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const struct usb_ss_ep_comp_descriptor *comp_desc;
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@ -36,9 +36,32 @@
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#define dump_register(nm) \
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{ \
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.name = __stringify(nm), \
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.offset = DWC3_ ##nm - DWC3_GLOBALS_REGS_START, \
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.offset = DWC3_ ##nm, \
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}
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#define dump_ep_register_set(n) \
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{ \
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.name = "DEPCMDPAR2("__stringify(n)")", \
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.offset = DWC3_DEP_BASE(n) + \
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DWC3_DEPCMDPAR2, \
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}, \
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{ \
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.name = "DEPCMDPAR1("__stringify(n)")", \
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.offset = DWC3_DEP_BASE(n) + \
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DWC3_DEPCMDPAR1, \
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}, \
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{ \
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.name = "DEPCMDPAR0("__stringify(n)")", \
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.offset = DWC3_DEP_BASE(n) + \
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DWC3_DEPCMDPAR0, \
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}, \
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{ \
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.name = "DEPCMD("__stringify(n)")", \
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.offset = DWC3_DEP_BASE(n) + \
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DWC3_DEPCMD, \
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}
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static const struct debugfs_reg32 dwc3_regs[] = {
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dump_register(GSBUSCFG0),
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dump_register(GSBUSCFG1),
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@ -218,137 +241,38 @@ static const struct debugfs_reg32 dwc3_regs[] = {
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dump_register(DGCMD),
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dump_register(DALEPENA),
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dump_register(DEPCMDPAR2(0)),
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dump_register(DEPCMDPAR2(1)),
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dump_register(DEPCMDPAR2(2)),
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dump_register(DEPCMDPAR2(3)),
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dump_register(DEPCMDPAR2(4)),
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dump_register(DEPCMDPAR2(5)),
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dump_register(DEPCMDPAR2(6)),
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dump_register(DEPCMDPAR2(7)),
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dump_register(DEPCMDPAR2(8)),
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dump_register(DEPCMDPAR2(9)),
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dump_register(DEPCMDPAR2(10)),
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dump_register(DEPCMDPAR2(11)),
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dump_register(DEPCMDPAR2(12)),
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dump_register(DEPCMDPAR2(13)),
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dump_register(DEPCMDPAR2(14)),
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dump_register(DEPCMDPAR2(15)),
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dump_register(DEPCMDPAR2(16)),
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dump_register(DEPCMDPAR2(17)),
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dump_register(DEPCMDPAR2(18)),
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dump_register(DEPCMDPAR2(19)),
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dump_register(DEPCMDPAR2(20)),
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dump_register(DEPCMDPAR2(21)),
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dump_register(DEPCMDPAR2(22)),
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dump_register(DEPCMDPAR2(23)),
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dump_register(DEPCMDPAR2(24)),
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dump_register(DEPCMDPAR2(25)),
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dump_register(DEPCMDPAR2(26)),
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dump_register(DEPCMDPAR2(27)),
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dump_register(DEPCMDPAR2(28)),
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dump_register(DEPCMDPAR2(29)),
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dump_register(DEPCMDPAR2(30)),
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dump_register(DEPCMDPAR2(31)),
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dump_register(DEPCMDPAR1(0)),
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dump_register(DEPCMDPAR1(1)),
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dump_register(DEPCMDPAR1(2)),
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dump_register(DEPCMDPAR1(3)),
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dump_register(DEPCMDPAR1(4)),
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dump_register(DEPCMDPAR1(5)),
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dump_register(DEPCMDPAR1(6)),
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dump_register(DEPCMDPAR1(7)),
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dump_register(DEPCMDPAR1(8)),
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dump_register(DEPCMDPAR1(9)),
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dump_register(DEPCMDPAR1(10)),
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dump_register(DEPCMDPAR1(11)),
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dump_register(DEPCMDPAR1(12)),
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dump_register(DEPCMDPAR1(13)),
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dump_register(DEPCMDPAR1(14)),
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dump_register(DEPCMDPAR1(15)),
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dump_register(DEPCMDPAR1(16)),
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dump_register(DEPCMDPAR1(17)),
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dump_register(DEPCMDPAR1(18)),
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dump_register(DEPCMDPAR1(19)),
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dump_register(DEPCMDPAR1(20)),
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dump_register(DEPCMDPAR1(21)),
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dump_register(DEPCMDPAR1(22)),
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dump_register(DEPCMDPAR1(23)),
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dump_register(DEPCMDPAR1(24)),
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dump_register(DEPCMDPAR1(25)),
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dump_register(DEPCMDPAR1(26)),
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dump_register(DEPCMDPAR1(27)),
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dump_register(DEPCMDPAR1(28)),
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dump_register(DEPCMDPAR1(29)),
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dump_register(DEPCMDPAR1(30)),
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dump_register(DEPCMDPAR1(31)),
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dump_register(DEPCMDPAR0(0)),
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dump_register(DEPCMDPAR0(1)),
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dump_register(DEPCMDPAR0(2)),
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dump_register(DEPCMDPAR0(3)),
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dump_register(DEPCMDPAR0(4)),
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dump_register(DEPCMDPAR0(5)),
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dump_register(DEPCMDPAR0(6)),
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dump_register(DEPCMDPAR0(7)),
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dump_register(DEPCMDPAR0(8)),
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dump_register(DEPCMDPAR0(9)),
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dump_register(DEPCMDPAR0(10)),
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dump_register(DEPCMDPAR0(11)),
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dump_register(DEPCMDPAR0(12)),
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dump_register(DEPCMDPAR0(13)),
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dump_register(DEPCMDPAR0(14)),
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dump_register(DEPCMDPAR0(15)),
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dump_register(DEPCMDPAR0(16)),
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dump_register(DEPCMDPAR0(17)),
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dump_register(DEPCMDPAR0(18)),
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dump_register(DEPCMDPAR0(19)),
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dump_register(DEPCMDPAR0(20)),
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dump_register(DEPCMDPAR0(21)),
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dump_register(DEPCMDPAR0(22)),
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dump_register(DEPCMDPAR0(23)),
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dump_register(DEPCMDPAR0(24)),
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dump_register(DEPCMDPAR0(25)),
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dump_register(DEPCMDPAR0(26)),
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dump_register(DEPCMDPAR0(27)),
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dump_register(DEPCMDPAR0(28)),
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dump_register(DEPCMDPAR0(29)),
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dump_register(DEPCMDPAR0(30)),
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dump_register(DEPCMDPAR0(31)),
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dump_register(DEPCMD(0)),
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dump_register(DEPCMD(1)),
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dump_register(DEPCMD(2)),
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dump_register(DEPCMD(3)),
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dump_register(DEPCMD(4)),
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dump_register(DEPCMD(5)),
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dump_register(DEPCMD(6)),
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dump_register(DEPCMD(7)),
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dump_register(DEPCMD(8)),
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dump_register(DEPCMD(9)),
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dump_register(DEPCMD(10)),
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dump_register(DEPCMD(11)),
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dump_register(DEPCMD(12)),
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dump_register(DEPCMD(13)),
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dump_register(DEPCMD(14)),
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dump_register(DEPCMD(15)),
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dump_register(DEPCMD(16)),
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dump_register(DEPCMD(17)),
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dump_register(DEPCMD(18)),
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dump_register(DEPCMD(19)),
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dump_register(DEPCMD(20)),
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dump_register(DEPCMD(21)),
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dump_register(DEPCMD(22)),
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dump_register(DEPCMD(23)),
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dump_register(DEPCMD(24)),
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dump_register(DEPCMD(25)),
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dump_register(DEPCMD(26)),
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dump_register(DEPCMD(27)),
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dump_register(DEPCMD(28)),
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dump_register(DEPCMD(29)),
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dump_register(DEPCMD(30)),
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dump_register(DEPCMD(31)),
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dump_ep_register_set(0),
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dump_ep_register_set(1),
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dump_ep_register_set(2),
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dump_ep_register_set(3),
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dump_ep_register_set(4),
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dump_ep_register_set(5),
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dump_ep_register_set(6),
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dump_ep_register_set(7),
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dump_ep_register_set(8),
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dump_ep_register_set(9),
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dump_ep_register_set(10),
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dump_ep_register_set(11),
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dump_ep_register_set(12),
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dump_ep_register_set(13),
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dump_ep_register_set(14),
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dump_ep_register_set(15),
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dump_ep_register_set(16),
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dump_ep_register_set(17),
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dump_ep_register_set(18),
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dump_ep_register_set(19),
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dump_ep_register_set(20),
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dump_ep_register_set(21),
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dump_ep_register_set(22),
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dump_ep_register_set(23),
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dump_ep_register_set(24),
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dump_ep_register_set(25),
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dump_ep_register_set(26),
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dump_ep_register_set(27),
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dump_ep_register_set(28),
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dump_ep_register_set(29),
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dump_ep_register_set(30),
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dump_ep_register_set(31),
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dump_register(OCFG),
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dump_register(OCTL),
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@ -939,7 +863,7 @@ void dwc3_debugfs_init(struct dwc3 *dwc)
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dwc->regset->regs = dwc3_regs;
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dwc->regset->nregs = ARRAY_SIZE(dwc3_regs);
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dwc->regset->base = dwc->regs;
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dwc->regset->base = dwc->regs - DWC3_GLOBALS_REGS_START;
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file = debugfs_create_regset32("regdump", S_IRUGO, root, dwc->regset);
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if (!file)
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@ -106,9 +106,7 @@ static int dwc3_ep0_start_trans(struct dwc3 *dwc, u8 epnum, dma_addr_t buf_dma,
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}
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dep->flags |= DWC3_EP_BUSY;
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dep->resource_index = dwc3_gadget_ep_get_transfer_index(dwc,
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dep->number);
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dep->resource_index = dwc3_gadget_ep_get_transfer_index(dep);
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dwc->ep0_next_event = DWC3_EP0_COMPLETE;
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return 0;
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@ -248,8 +248,6 @@ int dwc3_send_gadget_ep_cmd(struct dwc3_ep *dep, unsigned cmd,
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int susphy = false;
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int ret = -EINVAL;
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unsigned ep = dep->number;
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trace_dwc3_gadget_ep_cmd(dep, cmd, params);
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/*
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@ -281,13 +279,13 @@ int dwc3_send_gadget_ep_cmd(struct dwc3_ep *dep, unsigned cmd,
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}
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}
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dwc3_writel(dwc->regs, DWC3_DEPCMDPAR0(ep), params->param0);
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dwc3_writel(dwc->regs, DWC3_DEPCMDPAR1(ep), params->param1);
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dwc3_writel(dwc->regs, DWC3_DEPCMDPAR2(ep), params->param2);
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dwc3_writel(dep->regs, DWC3_DEPCMDPAR0, params->param0);
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dwc3_writel(dep->regs, DWC3_DEPCMDPAR1, params->param1);
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dwc3_writel(dep->regs, DWC3_DEPCMDPAR2, params->param2);
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dwc3_writel(dwc->regs, DWC3_DEPCMD(ep), cmd | DWC3_DEPCMD_CMDACT);
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dwc3_writel(dep->regs, DWC3_DEPCMD, cmd | DWC3_DEPCMD_CMDACT);
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do {
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reg = dwc3_readl(dwc->regs, DWC3_DEPCMD(ep));
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reg = dwc3_readl(dep->regs, DWC3_DEPCMD);
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if (!(reg & DWC3_DEPCMD_CMDACT)) {
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int cmd_status = DWC3_DEPCMD_STATUS(reg);
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@ -1025,8 +1023,7 @@ static int __dwc3_gadget_kick_transfer(struct dwc3_ep *dep, u16 cmd_param)
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dep->flags |= DWC3_EP_BUSY;
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if (starting) {
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dep->resource_index = dwc3_gadget_ep_get_transfer_index(dwc,
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dep->number);
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dep->resource_index = dwc3_gadget_ep_get_transfer_index(dep);
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WARN_ON_ONCE(!dep->resource_index);
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}
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@ -1830,6 +1827,7 @@ static int dwc3_gadget_init_hw_endpoints(struct dwc3 *dwc,
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dep->dwc = dwc;
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dep->number = epnum;
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dep->direction = !!direction;
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dep->regs = dwc->regs + DWC3_DEP_BASE(epnum);
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dwc->eps[epnum] = dep;
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snprintf(dep->name, sizeof(dep->name), "ep%d%s", epnum >> 1,
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@ -95,11 +95,11 @@ int __dwc3_gadget_ep_set_halt(struct dwc3_ep *dep, int value, int protocol);
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*
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* Caller should take care of locking
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*/
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static inline u32 dwc3_gadget_ep_get_transfer_index(struct dwc3 *dwc, u8 number)
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static inline u32 dwc3_gadget_ep_get_transfer_index(struct dwc3_ep *dep)
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{
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u32 res_id;
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res_id = dwc3_readl(dwc->regs, DWC3_DEPCMD(number));
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res_id = dwc3_readl(dep->regs, DWC3_DEPCMD);
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return DWC3_DEPCMD_GET_RSC_IDX(res_id);
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}
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@ -26,7 +26,6 @@
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static inline u32 dwc3_readl(void __iomem *base, u32 offset)
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{
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u32 offs = offset - DWC3_GLOBALS_REGS_START;
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u32 value;
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/*
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@ -34,7 +33,7 @@ static inline u32 dwc3_readl(void __iomem *base, u32 offset)
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* space, see dwc3_probe in core.c.
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* However, the offsets are given starting from xHCI address space.
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*/
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value = readl(base + offs);
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value = readl(base + offset - DWC3_GLOBALS_REGS_START);
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/*
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* When tracing we want to make it easy to find the correct address on
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@ -49,14 +48,12 @@ static inline u32 dwc3_readl(void __iomem *base, u32 offset)
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static inline void dwc3_writel(void __iomem *base, u32 offset, u32 value)
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{
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u32 offs = offset - DWC3_GLOBALS_REGS_START;
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/*
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* We requested the mem region starting from the Globals address
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* space, see dwc3_probe in core.c.
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* However, the offsets are given starting from xHCI address space.
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*/
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writel(value, base + offs);
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writel(value, base + offset - DWC3_GLOBALS_REGS_START);
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/*
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* When tracing we want to make it easy to find the correct address on
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