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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-26 22:20:56 +07:00
[SCSI] be2iscsi: Fix MACRO for checking the adapter type
Fixed the code flow based on the MACRO defined to check for adapter. Signed-off-by: John Soni Jose <sony.john-n@emulex.com> Signed-off-by: Jayamohan Kallickal <jayamohan.kallickal@emulex.com> Reviewed-by: Mike Christie <michaelc@cs.wisc.edu> Signed-off-by: James Bottomley <JBottomley@Parallels.com>
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43f388b02e
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2c9dfd3649
@ -855,20 +855,7 @@ int beiscsi_cmd_cq_create(struct be_ctrl_info *ctrl,
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OPCODE_COMMON_CQ_CREATE, sizeof(*req));
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req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size));
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if (chip_skh_r(ctrl->pdev)) {
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req->hdr.version = MBX_CMD_VER2;
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req->page_size = 1;
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AMAP_SET_BITS(struct amap_cq_context_v2, coalescwm,
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ctxt, coalesce_wm);
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AMAP_SET_BITS(struct amap_cq_context_v2, nodelay,
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ctxt, no_delay);
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AMAP_SET_BITS(struct amap_cq_context_v2, count, ctxt,
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__ilog2_u32(cq->len / 256));
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AMAP_SET_BITS(struct amap_cq_context_v2, valid, ctxt, 1);
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AMAP_SET_BITS(struct amap_cq_context_v2, eventable, ctxt, 1);
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AMAP_SET_BITS(struct amap_cq_context_v2, eqid, ctxt, eq->id);
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AMAP_SET_BITS(struct amap_cq_context_v2, armed, ctxt, 1);
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} else {
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if (is_chip_be2_be3r(phba)) {
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AMAP_SET_BITS(struct amap_cq_context, coalescwm,
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ctxt, coalesce_wm);
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AMAP_SET_BITS(struct amap_cq_context, nodelay, ctxt, no_delay);
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@ -881,6 +868,19 @@ int beiscsi_cmd_cq_create(struct be_ctrl_info *ctrl,
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AMAP_SET_BITS(struct amap_cq_context, armed, ctxt, 1);
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AMAP_SET_BITS(struct amap_cq_context, func, ctxt,
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PCI_FUNC(ctrl->pdev->devfn));
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} else {
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req->hdr.version = MBX_CMD_VER2;
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req->page_size = 1;
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AMAP_SET_BITS(struct amap_cq_context_v2, coalescwm,
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ctxt, coalesce_wm);
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AMAP_SET_BITS(struct amap_cq_context_v2, nodelay,
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ctxt, no_delay);
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AMAP_SET_BITS(struct amap_cq_context_v2, count, ctxt,
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__ilog2_u32(cq->len / 256));
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AMAP_SET_BITS(struct amap_cq_context_v2, valid, ctxt, 1);
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AMAP_SET_BITS(struct amap_cq_context_v2, eventable, ctxt, 1);
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AMAP_SET_BITS(struct amap_cq_context_v2, eqid, ctxt, eq->id);
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AMAP_SET_BITS(struct amap_cq_context_v2, armed, ctxt, 1);
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}
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be_dws_cpu_to_le(ctxt, sizeof(req->context));
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@ -1368,16 +1368,16 @@ hwi_complete_drvr_msgs(struct beiscsi_conn *beiscsi_conn,
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uint16_t wrb_index, cid;
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phwi_ctrlr = phba->phwi_ctrlr;
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if (chip_skh_r(phba->pcidev)) {
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wrb_index = AMAP_GET_BITS(struct amap_it_dmsg_cqe_v2,
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wrb_idx, psol);
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cid = AMAP_GET_BITS(struct amap_it_dmsg_cqe_v2,
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cid, psol);
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} else {
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if (is_chip_be2_be3r(phba)) {
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wrb_index = AMAP_GET_BITS(struct amap_it_dmsg_cqe,
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wrb_idx, psol);
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cid = AMAP_GET_BITS(struct amap_it_dmsg_cqe,
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cid, psol);
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} else {
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wrb_index = AMAP_GET_BITS(struct amap_it_dmsg_cqe_v2,
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wrb_idx, psol);
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cid = AMAP_GET_BITS(struct amap_it_dmsg_cqe_v2,
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cid, psol);
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}
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pwrb_context = &phwi_ctrlr->wrb_context[
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@ -1418,7 +1418,26 @@ static void adapter_get_sol_cqe(struct beiscsi_hba *phba,
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struct sol_cqe *psol,
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struct common_sol_cqe *csol_cqe)
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{
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if (chip_skh_r(phba->pcidev)) {
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if (is_chip_be2_be3r(phba)) {
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csol_cqe->exp_cmdsn = AMAP_GET_BITS(struct amap_sol_cqe,
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i_exp_cmd_sn, psol);
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csol_cqe->res_cnt = AMAP_GET_BITS(struct amap_sol_cqe,
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i_res_cnt, psol);
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csol_cqe->cmd_wnd = AMAP_GET_BITS(struct amap_sol_cqe,
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i_cmd_wnd, psol);
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csol_cqe->wrb_index = AMAP_GET_BITS(struct amap_sol_cqe,
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wrb_index, psol);
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csol_cqe->cid = AMAP_GET_BITS(struct amap_sol_cqe,
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cid, psol);
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csol_cqe->hw_sts = AMAP_GET_BITS(struct amap_sol_cqe,
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hw_sts, psol);
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csol_cqe->i_resp = AMAP_GET_BITS(struct amap_sol_cqe,
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i_resp, psol);
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csol_cqe->i_sts = AMAP_GET_BITS(struct amap_sol_cqe,
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i_sts, psol);
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csol_cqe->i_flags = AMAP_GET_BITS(struct amap_sol_cqe,
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i_flags, psol);
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} else {
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csol_cqe->exp_cmdsn = AMAP_GET_BITS(struct amap_sol_cqe_v2,
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i_exp_cmd_sn, psol);
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csol_cqe->res_cnt = AMAP_GET_BITS(struct amap_sol_cqe_v2,
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@ -1445,25 +1464,6 @@ static void adapter_get_sol_cqe(struct beiscsi_hba *phba,
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if (AMAP_GET_BITS(struct amap_sol_cqe_v2,
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o, psol))
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csol_cqe->i_flags |= ISCSI_FLAG_CMD_OVERFLOW;
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} else {
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csol_cqe->exp_cmdsn = AMAP_GET_BITS(struct amap_sol_cqe,
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i_exp_cmd_sn, psol);
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csol_cqe->res_cnt = AMAP_GET_BITS(struct amap_sol_cqe,
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i_res_cnt, psol);
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csol_cqe->cmd_wnd = AMAP_GET_BITS(struct amap_sol_cqe,
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i_cmd_wnd, psol);
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csol_cqe->wrb_index = AMAP_GET_BITS(struct amap_sol_cqe,
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wrb_index, psol);
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csol_cqe->cid = AMAP_GET_BITS(struct amap_sol_cqe,
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cid, psol);
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csol_cqe->hw_sts = AMAP_GET_BITS(struct amap_sol_cqe,
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hw_sts, psol);
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csol_cqe->i_resp = AMAP_GET_BITS(struct amap_sol_cqe,
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i_resp, psol);
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csol_cqe->i_sts = AMAP_GET_BITS(struct amap_sol_cqe,
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i_sts, psol);
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csol_cqe->i_flags = AMAP_GET_BITS(struct amap_sol_cqe,
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i_flags, psol);
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}
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}
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@ -1561,16 +1561,16 @@ hwi_get_async_handle(struct beiscsi_hba *phba,
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unsigned char is_header = 0;
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unsigned int index, dpl;
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if (chip_skh_r(phba->pcidev)) {
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dpl = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe_v2,
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dpl, pdpdu_cqe);
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index = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe_v2,
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index, pdpdu_cqe);
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} else {
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if (is_chip_be2_be3r(phba)) {
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dpl = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe,
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dpl, pdpdu_cqe);
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index = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe,
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index, pdpdu_cqe);
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} else {
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dpl = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe_v2,
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dpl, pdpdu_cqe);
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index = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe_v2,
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index, pdpdu_cqe);
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}
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phys_addr.u.a32.address_lo =
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@ -2028,7 +2028,9 @@ static unsigned int beiscsi_process_cq(struct be_eq_obj *pbe_eq)
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32] & CQE_CODE_MASK);
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/* Get the CID */
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if (chip_skh_r(phba->pcidev)) {
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if (is_chip_be2_be3r(phba)) {
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cid = AMAP_GET_BITS(struct amap_sol_cqe, cid, sol);
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} else {
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if ((code == DRIVERMSG_NOTIFY) ||
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(code == UNSOL_HDR_NOTIFY) ||
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(code == UNSOL_DATA_NOTIFY))
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@ -2038,8 +2040,7 @@ static unsigned int beiscsi_process_cq(struct be_eq_obj *pbe_eq)
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else
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cid = AMAP_GET_BITS(struct amap_sol_cqe_v2,
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cid, sol);
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} else
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cid = AMAP_GET_BITS(struct amap_sol_cqe, cid, sol);
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}
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ep = phba->ep_array[cid - phba->fw_config.iscsi_cid_start];
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beiscsi_ep = ep->dd_data;
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@ -2416,11 +2417,11 @@ static void hwi_write_buffer(struct iscsi_wrb *pwrb, struct iscsi_task *task)
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/* Check for the data_count */
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dsp_value = (task->data_count) ? 1 : 0;
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if (chip_skh_r(phba->pcidev))
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AMAP_SET_BITS(struct amap_iscsi_wrb_v2, dsp,
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if (is_chip_be2_be3r(phba))
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AMAP_SET_BITS(struct amap_iscsi_wrb, dsp,
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pwrb, dsp_value);
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else
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AMAP_SET_BITS(struct amap_iscsi_wrb, dsp,
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AMAP_SET_BITS(struct amap_iscsi_wrb_v2, dsp,
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pwrb, dsp_value);
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/* Map addr only if there is data_count */
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@ -4175,11 +4176,11 @@ beiscsi_offload_connection(struct beiscsi_conn *beiscsi_conn,
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phba->fw_config.iscsi_cid_start));
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/* Check for the adapter family */
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if (chip_skh_r(phba->pcidev))
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beiscsi_offload_cxn_v2(params, pwrb_handle);
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else
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if (is_chip_be2_be3r(phba))
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beiscsi_offload_cxn_v0(params, pwrb_handle,
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phba->init_mem);
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else
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beiscsi_offload_cxn_v2(params, pwrb_handle);
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be_dws_le_to_cpu(pwrb_handle->pwrb,
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sizeof(struct iscsi_target_context_update_wrb));
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@ -4490,19 +4491,7 @@ static int beiscsi_mtask(struct iscsi_task *task)
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pwrb = io_task->pwrb_handle->pwrb;
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memset(pwrb, 0, sizeof(*pwrb));
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if (chip_skh_r(phba->pcidev)) {
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AMAP_SET_BITS(struct amap_iscsi_wrb_v2, cmdsn_itt, pwrb,
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be32_to_cpu(task->cmdsn));
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AMAP_SET_BITS(struct amap_iscsi_wrb_v2, wrb_idx, pwrb,
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io_task->pwrb_handle->wrb_index);
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AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sgl_idx, pwrb,
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io_task->psgl_handle->sgl_index);
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AMAP_SET_BITS(struct amap_iscsi_wrb_v2, r2t_exp_dtl, pwrb,
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task->data_count);
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AMAP_SET_BITS(struct amap_iscsi_wrb_v2, ptr2nextwrb, pwrb,
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io_task->pwrb_handle->nxt_wrb_index);
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pwrb_typeoffset = SKH_WRB_TYPE_OFFSET;
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} else {
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if (is_chip_be2_be3r(phba)) {
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AMAP_SET_BITS(struct amap_iscsi_wrb, cmdsn_itt, pwrb,
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be32_to_cpu(task->cmdsn));
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AMAP_SET_BITS(struct amap_iscsi_wrb, wrb_idx, pwrb,
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@ -4514,6 +4503,18 @@ static int beiscsi_mtask(struct iscsi_task *task)
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AMAP_SET_BITS(struct amap_iscsi_wrb, ptr2nextwrb, pwrb,
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io_task->pwrb_handle->nxt_wrb_index);
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pwrb_typeoffset = BE_WRB_TYPE_OFFSET;
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} else {
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AMAP_SET_BITS(struct amap_iscsi_wrb_v2, cmdsn_itt, pwrb,
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be32_to_cpu(task->cmdsn));
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AMAP_SET_BITS(struct amap_iscsi_wrb_v2, wrb_idx, pwrb,
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io_task->pwrb_handle->wrb_index);
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AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sgl_idx, pwrb,
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io_task->psgl_handle->sgl_index);
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AMAP_SET_BITS(struct amap_iscsi_wrb_v2, r2t_exp_dtl, pwrb,
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task->data_count);
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AMAP_SET_BITS(struct amap_iscsi_wrb_v2, ptr2nextwrb, pwrb,
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io_task->pwrb_handle->nxt_wrb_index);
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pwrb_typeoffset = SKH_WRB_TYPE_OFFSET;
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}
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@ -4526,19 +4527,19 @@ static int beiscsi_mtask(struct iscsi_task *task)
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case ISCSI_OP_NOOP_OUT:
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if (task->hdr->ttt != ISCSI_RESERVED_TAG) {
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ADAPTER_SET_WRB_TYPE(pwrb, TGT_DM_CMD, pwrb_typeoffset);
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if (chip_skh_r(phba->pcidev))
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AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
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if (is_chip_be2_be3r(phba))
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AMAP_SET_BITS(struct amap_iscsi_wrb,
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dmsg, pwrb, 1);
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else
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AMAP_SET_BITS(struct amap_iscsi_wrb,
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AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
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dmsg, pwrb, 1);
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} else {
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ADAPTER_SET_WRB_TYPE(pwrb, INI_RD_CMD, pwrb_typeoffset);
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if (chip_skh_r(phba->pcidev))
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AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
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if (is_chip_be2_be3r(phba))
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AMAP_SET_BITS(struct amap_iscsi_wrb,
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dmsg, pwrb, 0);
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else
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AMAP_SET_BITS(struct amap_iscsi_wrb,
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AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
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dmsg, pwrb, 0);
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}
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hwi_write_buffer(pwrb, task);
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@ -4565,9 +4566,9 @@ static int beiscsi_mtask(struct iscsi_task *task)
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}
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/* Set the task type */
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io_task->wrb_type = (chip_skh_r(phba->pcidev)) ?
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AMAP_GET_BITS(struct amap_iscsi_wrb_v2, type, pwrb) :
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AMAP_GET_BITS(struct amap_iscsi_wrb, type, pwrb);
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io_task->wrb_type = (is_chip_be2_be3r(phba)) ?
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AMAP_GET_BITS(struct amap_iscsi_wrb, type, pwrb) :
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AMAP_GET_BITS(struct amap_iscsi_wrb_v2, type, pwrb);
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doorbell |= cid & DB_WRB_POST_CID_MASK;
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doorbell |= (io_task->pwrb_handle->wrb_index &
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@ -265,7 +265,9 @@ struct invalidate_command_table {
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unsigned short cid;
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} __packed;
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#define chip_skh_r(pdev) (pdev->device == OC_SKH_ID1)
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#define chip_be2(phba) (phba->generation == BE_GEN2)
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#define chip_be3_r(phba) (phba->generation == BE_GEN3)
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#define is_chip_be2_be3r(phba) (chip_be3_r(phba) || (chip_be2(phba)))
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struct beiscsi_hba {
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struct hba_parameters params;
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struct hwi_controller *phwi_ctrlr;
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