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video: exynos_dp: Remove sink control to D0

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According to DP spec, it is not required in the Link Training
procedure.

[jg1.han@samsung.com: modified the commit message]
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
This commit is contained in:
Sean Paul 2012-11-01 10:38:49 +09:00 committed by Jingoo Han
parent 1cefc1d680
commit 2c95a81032
1 changed files with 0 additions and 6 deletions
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6
drivers/video/exynos/exynos_dp_core.c
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@ -278,12 +278,6 @@ static int exynos_dp_link_start(struct exynos_dp_device *dp)
for (lane = 0; lane < lane_count; lane++)
dp->link_train.cr_loop[lane] = 0;
/* Set sink to D0 (Sink Not Ready) mode. */
retval = exynos_dp_write_byte_to_dpcd(dp, DPCD_ADDR_SINK_POWER_STATE,
DPCD_SET_POWER_STATE_D0);
if (retval)
return retval;
/* Set link rate and count as you want to establish*/
exynos_dp_set_link_bandwidth(dp, dp->link_train.link_rate);
exynos_dp_set_lane_count(dp, dp->link_train.lane_count);