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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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mmc: tmio: give read32/write32 functions more descriptive names
Looking at the backlogs, I am not the only one who missed that the above functions do not read u32 from one register, but create a virtual u32 from reading to adjacent u16 registers (which depending on 'bus_shift' can be up to 8 byte apart). Because this driver supports old hardware for which we don't have documentation, I first wrongly assumed there was a variant which had a few u32 registers. Let's give the functions more descriptive names to make it more obvious what is happening. Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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@ -232,7 +232,7 @@ static inline void sd_ctrl_read16_rep(struct tmio_mmc_host *host, int addr,
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readsw(host->ctl + (addr << host->bus_shift), buf, count);
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}
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static inline u32 sd_ctrl_read32(struct tmio_mmc_host *host, int addr)
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static inline u32 sd_ctrl_read16_and_16_as_32(struct tmio_mmc_host *host, int addr)
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{
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return readw(host->ctl + (addr << host->bus_shift)) |
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readw(host->ctl + ((addr + 2) << host->bus_shift)) << 16;
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@ -254,11 +254,10 @@ static inline void sd_ctrl_write16_rep(struct tmio_mmc_host *host, int addr,
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writesw(host->ctl + (addr << host->bus_shift), buf, count);
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}
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static inline void sd_ctrl_write32(struct tmio_mmc_host *host, int addr, u32 val)
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static inline void sd_ctrl_write32_as_16_and_16(struct tmio_mmc_host *host, int addr, u32 val)
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{
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writew(val, host->ctl + (addr << host->bus_shift));
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writew(val >> 16, host->ctl + ((addr + 2) << host->bus_shift));
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}
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#endif
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@ -55,18 +55,18 @@
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void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
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{
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host->sdcard_irq_mask &= ~(i & TMIO_MASK_IRQ);
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sd_ctrl_write32(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
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sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
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}
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void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
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{
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host->sdcard_irq_mask |= (i & TMIO_MASK_IRQ);
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sd_ctrl_write32(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
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sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
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}
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static void tmio_mmc_ack_mmc_irqs(struct tmio_mmc_host *host, u32 i)
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{
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sd_ctrl_write32(host, CTL_STATUS, ~i);
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sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, ~i);
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}
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static void tmio_mmc_init_sg(struct tmio_mmc_host *host, struct mmc_data *data)
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@ -375,7 +375,7 @@ static int tmio_mmc_start_command(struct tmio_mmc_host *host, struct mmc_command
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tmio_mmc_enable_mmc_irqs(host, irq_mask);
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/* Fire off the command */
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sd_ctrl_write32(host, CTL_ARG_REG, cmd->arg);
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sd_ctrl_write32_as_16_and_16(host, CTL_ARG_REG, cmd->arg);
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sd_ctrl_write16(host, CTL_SD_CMD, c);
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return 0;
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@ -530,7 +530,7 @@ static void tmio_mmc_data_irq(struct tmio_mmc_host *host)
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goto out;
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if (host->chan_tx && (data->flags & MMC_DATA_WRITE) && !host->force_pio) {
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u32 status = sd_ctrl_read32(host, CTL_STATUS);
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u32 status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS);
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bool done = false;
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/*
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@ -585,7 +585,7 @@ static void tmio_mmc_cmd_irq(struct tmio_mmc_host *host,
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*/
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for (i = 3, addr = CTL_RESPONSE ; i >= 0 ; i--, addr += 4)
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cmd->resp[i] = sd_ctrl_read32(host, addr);
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cmd->resp[i] = sd_ctrl_read16_and_16_as_32(host, addr);
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if (cmd->flags & MMC_RSP_136) {
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cmd->resp[0] = (cmd->resp[0] << 8) | (cmd->resp[1] >> 24);
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@ -702,14 +702,14 @@ irqreturn_t tmio_mmc_irq(int irq, void *devid)
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struct tmio_mmc_host *host = devid;
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unsigned int ireg, status;
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status = sd_ctrl_read32(host, CTL_STATUS);
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status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS);
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ireg = status & TMIO_MASK_IRQ & ~host->sdcard_irq_mask;
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pr_debug_status(status);
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pr_debug_status(ireg);
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/* Clear the status except the interrupt status */
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sd_ctrl_write32(host, CTL_STATUS, TMIO_MASK_IRQ);
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sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, TMIO_MASK_IRQ);
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if (__tmio_mmc_card_detect_irq(host, ireg, status))
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return IRQ_HANDLED;
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@ -944,7 +944,7 @@ static int tmio_mmc_get_ro(struct mmc_host *mmc)
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return ret;
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ret = !((pdata->flags & TMIO_MMC_WRPROTECT_DISABLE) ||
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(sd_ctrl_read32(host, CTL_STATUS) & TMIO_STAT_WRPROTECT));
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(sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) & TMIO_STAT_WRPROTECT));
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return ret;
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}
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@ -964,7 +964,7 @@ static int tmio_mmc_card_busy(struct mmc_host *mmc)
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{
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struct tmio_mmc_host *host = mmc_priv(mmc);
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return !(sd_ctrl_read32(host, CTL_STATUS2) & TMIO_STATUS2_DAT0);
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return !(sd_ctrl_read16_and_16_as_32(host, CTL_STATUS2) & TMIO_STATUS2_DAT0);
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}
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static struct mmc_host_ops tmio_mmc_ops = {
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@ -1113,7 +1113,7 @@ int tmio_mmc_host_probe(struct tmio_mmc_host *_host,
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tmio_mmc_clk_stop(_host);
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tmio_mmc_reset(_host);
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_host->sdcard_irq_mask = sd_ctrl_read32(_host, CTL_IRQ_MASK);
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_host->sdcard_irq_mask = sd_ctrl_read16_and_16_as_32(_host, CTL_IRQ_MASK);
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tmio_mmc_disable_mmc_irqs(_host, TMIO_MASK_ALL);
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/* Unmask the IRQs we want to know about */
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