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media: i2c: adv7842: Replace mdelay() with msleep() and usleep_range() in adv7842_ddr_ram_test()
adv7842_ddr_ram_test() is never called in atomic context. It only calls from: adv7842_ddr_ram_test() <- adv7842_command_ram_test() <- adv7842_ioctl() adv7842_ddr_ram_test() calls mdelay() to busily wait, which is not necessary. mdelay() can be replaced with msleep() and usleep_range(). This is found by a static analysis tool named DCNS written by myself. Signed-off-by: Jia-Ju Bai <baijiaju1990@gmail.com> Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com> Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
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@ -3102,7 +3102,7 @@ static int adv7842_ddr_ram_test(struct v4l2_subdev *sd)
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sdp_write(sd, 0x12, 0x00); /* Disable 3D comb, Frame TBC & 3DNR */
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io_write(sd, 0xFF, 0x04); /* Reset memory controller */
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mdelay(5);
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usleep_range(5000, 6000);
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sdp_write(sd, 0x12, 0x00); /* Disable 3D Comb, Frame TBC & 3DNR */
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sdp_io_write(sd, 0x2A, 0x01); /* Memory BIST Initialisation */
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@ -3116,12 +3116,12 @@ static int adv7842_ddr_ram_test(struct v4l2_subdev *sd)
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sdp_io_write(sd, 0x7d, 0x00); /* Memory BIST Initialisation */
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sdp_io_write(sd, 0x7e, 0x1a); /* Memory BIST Initialisation */
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mdelay(5);
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usleep_range(5000, 6000);
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sdp_io_write(sd, 0xd9, 0xd5); /* Enable BIST Test */
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sdp_write(sd, 0x12, 0x05); /* Enable FRAME TBC & 3D COMB */
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mdelay(20);
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msleep(20);
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for (i = 0; i < 10; i++) {
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u8 result = sdp_io_read(sd, 0xdb);
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@ -3132,7 +3132,7 @@ static int adv7842_ddr_ram_test(struct v4l2_subdev *sd)
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else
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pass++;
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}
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mdelay(20);
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msleep(20);
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}
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v4l2_dbg(1, debug, sd,
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