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ARM: dts: imx6qdl-kontron-samx6i: Add iMX6-based Kontron SMARC-sAMX6i module
SMARC-sAMX6i is a SMARC (Smart Mobility Architecture) compliant module. Signed-off-by: Priit Laes <plaes@plaes.org> Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de> Signed-off-by: Marco Felsch <m.felsch@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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arch/arm/boot/dts/imx6qdl-kontron-samx6i.dtsi
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421
arch/arm/boot/dts/imx6qdl-kontron-samx6i.dtsi
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// SPDX-License-Identifier: GPL-2.0 OR X11
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/*
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* Copyright 2017 (C) Priit Laes <plaes@plaes.org>
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* Copyright 2018 (C) Pengutronix, Michael Grzeschik <mgr@pengutronix.de>
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* Copyright 2019 (C) Pengutronix, Marco Felsch <kernel@pengutronix.de>
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*
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* Based on initial work by Nikita Yushchenko <nyushchenko at dev.rtsoft.ru>
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*/
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#include <dt-bindings/gpio/gpio.h>
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/ {
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reg_1p0v_s0: regulator-1p0v-s0 {
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compatible = "regulator-fixed";
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regulator-name = "V_1V0_S0";
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <1000000>;
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regulator-always-on;
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regulator-boot-on;
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vin-supply = <®_smarc_suppy>;
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};
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reg_1p35v_vcoredig_s5: regulator-1p35v-vcoredig-s5 {
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compatible = "regulator-fixed";
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regulator-name = "V_1V35_VCOREDIG_S5";
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regulator-min-microvolt = <1350000>;
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regulator-max-microvolt = <1350000>;
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regulator-always-on;
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regulator-boot-on;
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vin-supply = <®_3p3v_s5>;
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};
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reg_1p8v_s5: regulator-1p8v-s5 {
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compatible = "regulator-fixed";
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regulator-name = "V_1V8_S5";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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regulator-boot-on;
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vin-supply = <®_3p3v_s5>;
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};
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reg_3p3v_s0: regulator-3p3v-s0 {
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compatible = "regulator-fixed";
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regulator-name = "V_3V3_S0";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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regulator-boot-on;
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vin-supply = <®_3p3v_s5>;
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};
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reg_3p3v_s0: regulator-3p3v-s0 {
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compatible = "regulator-fixed";
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regulator-name = "V_3V3_S0";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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regulator-boot-on;
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vin-supply = <®_3p3v_s5>;
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};
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reg_3p3v_s5: regulator-3p3v-s5 {
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compatible = "regulator-fixed";
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regulator-name = "V_3V3_S5";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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regulator-boot-on;
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vin-supply = <®_smarc_suppy>;
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};
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reg_smarc_rtc: regulator-smarc-rtc {
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compatible = "regulator-fixed";
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regulator-name = "V_IN_RTC_BATT";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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regulator-boot-on;
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};
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/* Module supply range can be 3.00V ... 5.25V */
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reg_smarc_suppy: regulator-smarc-supply {
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compatible = "regulator-fixed";
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regulator-name = "V_IN_WIDE";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-always-on;
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regulator-boot-on;
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};
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i2c_intern: i2c-gpio-intern {
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compatible = "i2c-gpio";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c_gpio_intern>;
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sda-gpios = <&gpio1 28 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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scl-gpios = <&gpio1 30 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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i2c-gpio,delay-us = <2>; /* ~100 kHz */
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#address-cells = <1>;
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#size-cells = <0>;
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};
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};
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/* CAN0 */
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&can1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_flexcan1>;
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};
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/* CAN1 */
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&can2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_flexcan2>;
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};
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/* GBE */
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&fec {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_enet>;
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phy-mode = "rgmii";
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phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
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};
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&i2c_intern {
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pmic@8 {
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compatible = "fsl,pfuze100";
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reg = <0x08>;
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regulators {
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reg_v_core_s0: sw1ab {
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regulator-name = "V_CORE_S0";
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regulator-min-microvolt = <300000>;
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regulator-max-microvolt = <1875000>;
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regulator-boot-on;
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regulator-always-on;
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};
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reg_vddsoc_s0: sw1c {
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regulator-name = "V_VDDSOC_S0";
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regulator-min-microvolt = <300000>;
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regulator-max-microvolt = <1875000>;
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regulator-boot-on;
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regulator-always-on;
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};
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reg_3p15v_s0: sw2 {
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regulator-name = "V_3V15_S0";
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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/* sw3a/b is used in dual mode, but driver does not
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* support it. Although, there's no need to control
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* DDR power - so just leaving dummy entries for sw3a
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* and sw3b for now.
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*/
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sw3a {
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regulator-min-microvolt = <400000>;
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regulator-max-microvolt = <1975000>;
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regulator-boot-on;
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regulator-always-on;
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};
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sw3b {
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regulator-min-microvolt = <400000>;
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regulator-max-microvolt = <1975000>;
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regulator-boot-on;
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regulator-always-on;
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};
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reg_1p8v_s0: sw4 {
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regulator-name = "V_1V8_S0";
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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/* Regulator for USB */
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reg_5p0v_s0: swbst {
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regulator-name = "V_5V0_S0";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5150000>;
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regulator-boot-on;
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};
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reg_vsnvs: vsnvs {
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <3000000>;
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regulator-boot-on;
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regulator-always-on;
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};
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reg_vrefddr: vrefddr {
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regulator-boot-on;
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regulator-always-on;
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};
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/*
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* Per schematics, of all VGEN's, only VGEN5 has some
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* usage ... but even that - over DNI resistor
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*/
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vgen1 {
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <1550000>;
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};
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vgen2 {
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <1550000>;
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};
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vgen3 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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};
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vgen4 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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};
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reg_2p5v_s0: vgen5 {
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regulator-name = "V_2V5_S0";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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};
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vgen6 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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};
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};
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};
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};
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/* I2C_PM */
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&i2c3 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c3>;
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};
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&iomuxc {
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pinctrl_flexcan1: flexcan1grp {
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fsl,pins = <
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MX6QDL_PAD_GPIO_7__FLEXCAN1_TX 0x1b0b0
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MX6QDL_PAD_GPIO_8__FLEXCAN1_RX 0x1b0b0
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>;
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};
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pinctrl_flexcan2: flexcan2grp {
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fsl,pins = <
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MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x1b0b0
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MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x1b0b0
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>;
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};
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pinctrl_enet: enetgrp {
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fsl,pins = <
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MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
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MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
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MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
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MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
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MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
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MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
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MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
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MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
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MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
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MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
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MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
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MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
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MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
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MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
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MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
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MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b0b0 /* RST_GBE0_PHY# */
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>;
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};
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pinctrl_i2c_gpio_intern: i2c-gpiointerngrp {
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fsl,pins = <
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MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x1b0b0 /* SCL */
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MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b0 /* SDA */
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>;
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};
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pinctrl_i2c3: i2c3grp {
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fsl,pins = <
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MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
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MX6QDL_PAD_GPIO_16__I2C3_SDA 0x4001b8b1
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>;
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};
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pinctrl_pcie: pciegrp {
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fsl,pins = <
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MX6QDL_PAD_EIM_D18__GPIO3_IO18 0x1b0b0 /* PCI_A_PRSNT# */
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MX6QDL_PAD_EIM_DA13__GPIO3_IO13 0x1b0b0 /* RST_PCIE_A# */
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MX6QDL_PAD_SD3_DAT6__GPIO6_IO18 0x1b0b0 /* PCIE_WAKE# */
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>;
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};
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pinctrl_uart1: uart1grp {
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fsl,pins = <
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MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
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MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
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MX6QDL_PAD_EIM_D20__UART1_RTS_B 0x1b0b1
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MX6QDL_PAD_EIM_D19__UART1_CTS_B 0x1b0b1
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>;
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};
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pinctrl_uart2: uart2grp {
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fsl,pins = <
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MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
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MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1
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>;
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};
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pinctrl_uart4: uart4grp {
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fsl,pins = <
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MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b1
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MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1
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MX6QDL_PAD_CSI0_DAT16__UART4_RTS_B 0x1b0b1
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MX6QDL_PAD_CSI0_DAT17__UART4_CTS_B 0x1b0b1
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>;
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};
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pinctrl_uart5: uart5grp {
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fsl,pins = <
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MX6QDL_PAD_CSI0_DAT15__UART5_RX_DATA 0x1b0b1
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MX6QDL_PAD_CSI0_DAT14__UART5_TX_DATA 0x1b0b1
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>;
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};
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pinctrl_usbotg: usbotggrp {
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fsl,pins = <
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MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x1f8b0
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/* power, oc muxed but not used by the driver */
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MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18 0x1b0b0 /* USB power */
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MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20 0x1b0b0 /* USB OC */
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>;
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};
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pinctrl_usdhc4: usdhc4grp {
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fsl,pins = <
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MX6QDL_PAD_SD4_CLK__SD4_CLK 0x17059
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MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
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MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
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MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
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MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
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MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
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MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059
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MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059
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MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059
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MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059
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>;
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};
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};
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&pcie {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pcie>;
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wake-up-gpio = <&gpio6 18 GPIO_ACTIVE_HIGH>;
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reset-gpio = <&gpio3 13 GPIO_ACTIVE_HIGH>;
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};
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/* SER0 */
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&uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1>;
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uart-has-rtscts;
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};
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/* SER1 */
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&uart2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart2>;
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};
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/* SER2 */
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&uart4 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart4>;
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uart-has-rtscts;
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};
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/* SER3 */
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&uart5 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart5>;
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};
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/* USB0 */
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&usbotg {
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/*
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* no 'imx6-usb-charger-detection'
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* since USB_OTG_CHD_B pin is not wired
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*/
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usbotg>;
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};
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/* USB1/2 via hub */
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&usbh1 {
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vbus-supply = <®_5p0v_s0>;
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};
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/* SDMMC */
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&usdhc4 {
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/* Internal eMMC, optional on some boards */
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc4>;
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bus-width = <8>;
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no-sdio;
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no-sd;
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non-removable;
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vmmc-supply = <®_3p3v_s0>;
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vqmmc-supply = <®_1p8v_s0>;
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};
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