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drm/vmwgfx: Add surface define v4 command
Surface define v4 added new member buffer_byte_stride. With this patch add buffer_byte_stride in surface metadata and create surface using new command if support is available. Also with this patch replace device specific data types with kernel types. Signed-off-by: Deepak Rawat <drawat.floss@gmail.com> Reviewed-by: Thomas Hellström (VMware) <thomas_os@shipmail.org> Reviewed-by: Roland Scheidegger <sroland@vmware.com> Signed-off-by: Roland Scheidegger <sroland@vmware.com>
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@ -238,6 +238,7 @@ struct vmw_surface_offset;
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* @array_size: Number of array elements for a 1D/2D texture. For cubemap
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texture number of faces * array_size. This should be 0 for pre
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SM4 device.
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* @buffer_byte_stride: Buffer byte stride.
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* @num_sizes: Size of @sizes. For GB surface this should always be 1.
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* @base_size: Surface dimension.
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* @sizes: Array representing mip sizes. Legacy only.
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@ -255,6 +256,7 @@ struct vmw_surface_metadata {
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u32 autogen_filter;
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u32 array_size;
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u32 num_sizes;
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u32 buffer_byte_stride;
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struct drm_vmw_size base_size;
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struct drm_vmw_size *sizes;
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bool scanout;
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@ -1082,6 +1082,10 @@ static int vmw_gb_surface_create(struct vmw_resource *res)
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SVGA3dCmdHeader header;
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SVGA3dCmdDefineGBSurface_v3 body;
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} *cmd3;
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struct {
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SVGA3dCmdHeader header;
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SVGA3dCmdDefineGBSurface_v4 body;
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} *cmd4;
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if (likely(res->id != -1))
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return 0;
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@ -1098,7 +1102,11 @@ static int vmw_gb_surface_create(struct vmw_resource *res)
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goto out_no_fifo;
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}
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if (has_sm4_1_context(dev_priv) && metadata->array_size > 0) {
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if (has_sm5_context(dev_priv) && metadata->array_size > 0) {
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cmd_id = SVGA_3D_CMD_DEFINE_GB_SURFACE_V4;
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cmd_len = sizeof(cmd4->body);
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submit_len = sizeof(*cmd4);
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} else if (has_sm4_1_context(dev_priv) && metadata->array_size > 0) {
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cmd_id = SVGA_3D_CMD_DEFINE_GB_SURFACE_V3;
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cmd_len = sizeof(cmd3->body);
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submit_len = sizeof(*cmd3);
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@ -1116,12 +1124,29 @@ static int vmw_gb_surface_create(struct vmw_resource *res)
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cmd = VMW_FIFO_RESERVE(dev_priv, submit_len);
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cmd2 = (typeof(cmd2))cmd;
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cmd3 = (typeof(cmd3))cmd;
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cmd4 = (typeof(cmd4))cmd;
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if (unlikely(!cmd)) {
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ret = -ENOMEM;
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goto out_no_fifo;
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}
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if (has_sm4_1_context(dev_priv) && metadata->array_size > 0) {
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if (has_sm5_context(dev_priv) && metadata->array_size > 0) {
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cmd4->header.id = cmd_id;
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cmd4->header.size = cmd_len;
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cmd4->body.sid = srf->res.id;
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cmd4->body.surfaceFlags = metadata->flags;
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cmd4->body.format = metadata->format;
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cmd4->body.numMipLevels = metadata->mip_levels[0];
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cmd4->body.multisampleCount = metadata->multisample_count;
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cmd4->body.multisamplePattern = metadata->multisample_pattern;
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cmd4->body.qualityLevel = metadata->quality_level;
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cmd4->body.autogenFilter = metadata->autogen_filter;
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cmd4->body.size.width = metadata->base_size.width;
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cmd4->body.size.height = metadata->base_size.height;
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cmd4->body.size.depth = metadata->base_size.depth;
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cmd4->body.arraySize = metadata->array_size;
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cmd4->body.bufferByteStride = metadata->buffer_byte_stride;
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} else if (has_sm4_1_context(dev_priv) && metadata->array_size > 0) {
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cmd3->header.id = cmd_id;
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cmd3->header.size = cmd_len;
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cmd3->body.sid = srf->res.id;
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@ -1341,6 +1366,7 @@ int vmw_gb_surface_define_ioctl(struct drm_device *dev, void *data,
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req_ext.svga3d_flags_upper_32_bits = 0;
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req_ext.multisample_pattern = SVGA3D_MS_PATTERN_NONE;
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req_ext.quality_level = SVGA3D_MS_QUALITY_NONE;
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req_ext.buffer_byte_stride = 0;
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req_ext.must_be_zero = 0;
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return vmw_gb_surface_define_internal(dev, &req_ext, rep, file_priv);
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@ -1467,6 +1493,11 @@ vmw_gb_surface_define_internal(struct drm_device *dev,
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}
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}
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if (req->buffer_byte_stride > 0 && !has_sm5_context(dev_priv)) {
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VMW_DEBUG_USER("SM5 surface not supported.\n");
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return -EINVAL;
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}
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if ((svga3d_flags_64 & SVGA3D_SURFACE_MULTISAMPLE) &&
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req->base.multisample_count == 0) {
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VMW_DEBUG_USER("Invalid sample count.\n");
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@ -1491,6 +1522,7 @@ vmw_gb_surface_define_internal(struct drm_device *dev,
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metadata.multisample_pattern = req->multisample_pattern;
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metadata.quality_level = req->quality_level;
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metadata.array_size = req->base.array_size;
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metadata.buffer_byte_stride = req->buffer_byte_stride;
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metadata.num_sizes = 1;
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metadata.base_size = req->base.base_size;
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metadata.scanout = req->base.drm_surface_flags &
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@ -1133,7 +1133,7 @@ struct drm_vmw_handle_close_arg {
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* svga3d surface flags split into 2, upper half and lower half.
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*/
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enum drm_vmw_surface_version {
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drm_vmw_gb_surface_v1
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drm_vmw_gb_surface_v1,
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};
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/**
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@ -1144,6 +1144,7 @@ enum drm_vmw_surface_version {
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* @svga3d_flags_upper_32_bits: Upper 32 bits of svga3d flags.
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* @multisample_pattern: Multisampling pattern when msaa is supported.
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* @quality_level: Precision settings for each sample.
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* @buffer_byte_stride: Buffer byte stride.
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* @must_be_zero: Reserved for future usage.
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*
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* Input argument to the DRM_VMW_GB_SURFACE_CREATE_EXT Ioctl.
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@ -1152,10 +1153,11 @@ enum drm_vmw_surface_version {
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struct drm_vmw_gb_surface_create_ext_req {
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struct drm_vmw_gb_surface_create_req base;
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enum drm_vmw_surface_version version;
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uint32_t svga3d_flags_upper_32_bits;
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SVGA3dMSPattern multisample_pattern;
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SVGA3dMSQualityLevel quality_level;
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uint64_t must_be_zero;
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__u32 svga3d_flags_upper_32_bits;
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__u32 multisample_pattern;
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__u32 quality_level;
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__u32 buffer_byte_stride;
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__u32 must_be_zero;
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};
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/**
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