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powerpc/powernv/npu: Use flush_all_mm() instead of flush_tlb_mm()
With the optimisations introduced by commit a46cc7a908 ("powerpc/mm/radix: Improve TLB/PWC flushes"), flush_tlb_mm() no longer flushes the page walk cache with radix. Switch to using flush_all_mm() to ensure the pwc and tlb are properly flushed on the nmmu. Signed-off-by: Alistair Popple <alistair@popple.id.au> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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@ -549,7 +549,7 @@ static void mmio_invalidate(struct npu_context *npu_context, int va,
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* Unfortunately the nest mmu does not support flushing specific
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* addresses so we have to flush the whole mm.
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*/
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flush_tlb_mm(npu_context->mm);
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flush_all_mm(npu_context->mm);
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/*
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* Loop over all the NPUs this process is active on and launch
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