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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2025-01-17 10:26:09 +07:00
nfp: bpf: move software reg helpers and cmd table out of translator
Move the software reg helpers and some static data to nfp_asm.c. They are related to the previous patch, but move is done in a separate commit for ease of review. Signed-off-by: Jakub Kicinski <jakub.kicinski@netronome.com> Reviewed-by: Simon Horman <simon.horman@netronome.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -14,6 +14,7 @@ nfp-objs := \
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nfpcore/nfp_resource.o \
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nfpcore/nfp_rtsym.o \
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nfpcore/nfp_target.o \
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nfp_asm.o \
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nfp_app.o \
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nfp_app_nic.o \
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nfp_devlink.o \
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@ -110,154 +110,7 @@ nfp_prog_offset_to_index(struct nfp_prog *nfp_prog, unsigned int offset)
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return offset - nfp_prog->start_off;
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}
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/* --- SW reg --- */
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struct nfp_insn_ur_regs {
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enum alu_dst_ab dst_ab;
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u16 dst;
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u16 areg, breg;
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bool swap;
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bool wr_both;
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};
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struct nfp_insn_re_regs {
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enum alu_dst_ab dst_ab;
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u8 dst;
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u8 areg, breg;
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bool swap;
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bool wr_both;
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bool i8;
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};
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static u16 nfp_swreg_to_unreg(swreg reg, bool is_dst)
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{
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u16 val = swreg_value(reg);
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switch (swreg_type(reg)) {
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case NN_REG_GPR_A:
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case NN_REG_GPR_B:
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case NN_REG_GPR_BOTH:
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return val;
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case NN_REG_NNR:
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return UR_REG_NN | val;
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case NN_REG_XFER:
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return UR_REG_XFR | val;
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case NN_REG_IMM:
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if (val & ~0xff) {
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pr_err("immediate too large\n");
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return 0;
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}
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return UR_REG_IMM_encode(val);
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case NN_REG_NONE:
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return is_dst ? UR_REG_NO_DST : REG_NONE;
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}
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pr_err("unrecognized reg encoding %08x\n", reg);
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return 0;
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}
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static int
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swreg_to_unrestricted(swreg dst, swreg lreg, swreg rreg,
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struct nfp_insn_ur_regs *reg)
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{
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memset(reg, 0, sizeof(*reg));
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/* Decode destination */
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if (swreg_type(dst) == NN_REG_IMM)
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return -EFAULT;
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if (swreg_type(dst) == NN_REG_GPR_B)
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reg->dst_ab = ALU_DST_B;
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if (swreg_type(dst) == NN_REG_GPR_BOTH)
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reg->wr_both = true;
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reg->dst = nfp_swreg_to_unreg(dst, true);
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/* Decode source operands */
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if (swreg_type(lreg) == swreg_type(rreg))
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return -EFAULT;
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if (swreg_type(lreg) == NN_REG_GPR_B ||
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swreg_type(rreg) == NN_REG_GPR_A) {
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reg->areg = nfp_swreg_to_unreg(rreg, false);
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reg->breg = nfp_swreg_to_unreg(lreg, false);
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reg->swap = true;
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} else {
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reg->areg = nfp_swreg_to_unreg(lreg, false);
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reg->breg = nfp_swreg_to_unreg(rreg, false);
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}
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return 0;
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}
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static u16 nfp_swreg_to_rereg(swreg reg, bool is_dst, bool has_imm8, bool *i8)
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{
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u16 val = swreg_value(reg);
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switch (swreg_type(reg)) {
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case NN_REG_GPR_A:
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case NN_REG_GPR_B:
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case NN_REG_GPR_BOTH:
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return val;
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case NN_REG_XFER:
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return RE_REG_XFR | val;
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case NN_REG_IMM:
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if (val & ~(0x7f | has_imm8 << 7)) {
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pr_err("immediate too large\n");
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return 0;
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}
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*i8 = val & 0x80;
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return RE_REG_IMM_encode(val & 0x7f);
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case NN_REG_NONE:
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return is_dst ? RE_REG_NO_DST : REG_NONE;
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case NN_REG_NNR:
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pr_err("NNRs used with restricted encoding\n");
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return 0;
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}
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pr_err("unrecognized reg encoding\n");
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return 0;
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}
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static int
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swreg_to_restricted(swreg dst, swreg lreg, swreg rreg,
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struct nfp_insn_re_regs *reg, bool has_imm8)
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{
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memset(reg, 0, sizeof(*reg));
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/* Decode destination */
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if (swreg_type(dst) == NN_REG_IMM)
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return -EFAULT;
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if (swreg_type(dst) == NN_REG_GPR_B)
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reg->dst_ab = ALU_DST_B;
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if (swreg_type(dst) == NN_REG_GPR_BOTH)
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reg->wr_both = true;
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reg->dst = nfp_swreg_to_rereg(dst, true, false, NULL);
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/* Decode source operands */
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if (swreg_type(lreg) == swreg_type(rreg))
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return -EFAULT;
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if (swreg_type(lreg) == NN_REG_GPR_B ||
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swreg_type(rreg) == NN_REG_GPR_A) {
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reg->areg = nfp_swreg_to_rereg(rreg, false, has_imm8, ®->i8);
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reg->breg = nfp_swreg_to_rereg(lreg, false, has_imm8, ®->i8);
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reg->swap = true;
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} else {
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reg->areg = nfp_swreg_to_rereg(lreg, false, has_imm8, ®->i8);
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reg->breg = nfp_swreg_to_rereg(rreg, false, has_imm8, ®->i8);
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}
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return 0;
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}
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/* --- Emitters --- */
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static const struct cmd_tgt_act cmd_tgt_act[__CMD_TGT_MAP_SIZE] = {
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[CMD_TGT_WRITE8] = { 0x00, 0x42 },
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[CMD_TGT_READ8] = { 0x01, 0x43 },
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[CMD_TGT_READ_LE] = { 0x01, 0x40 },
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[CMD_TGT_READ_SWAP_LE] = { 0x03, 0x40 },
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};
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static void
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__emit_cmd(struct nfp_prog *nfp_prog, enum cmd_tgt_map op,
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u8 mode, u8 xfer, u8 areg, u8 breg, u8 size, bool sync)
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167
drivers/net/ethernet/netronome/nfp/nfp_asm.c
Normal file
167
drivers/net/ethernet/netronome/nfp/nfp_asm.c
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@ -0,0 +1,167 @@
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/*
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* Copyright (C) 2016-2017 Netronome Systems, Inc.
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*
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* This software is dual licensed under the GNU General License Version 2,
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* June 1991 as shown in the file COPYING in the top-level directory of this
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* source tree or the BSD 2-Clause License provided below. You have the
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* option to license this software under the complete terms of either license.
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*
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* The BSD 2-Clause License:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* 1. Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#include <linux/bitops.h>
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#include <linux/errno.h>
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#include <linux/kernel.h>
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#include <linux/string.h>
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#include <linux/types.h>
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#include "nfp_asm.h"
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const struct cmd_tgt_act cmd_tgt_act[__CMD_TGT_MAP_SIZE] = {
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[CMD_TGT_WRITE8] = { 0x00, 0x42 },
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[CMD_TGT_READ8] = { 0x01, 0x43 },
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[CMD_TGT_READ_LE] = { 0x01, 0x40 },
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[CMD_TGT_READ_SWAP_LE] = { 0x03, 0x40 },
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};
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static u16 nfp_swreg_to_unreg(swreg reg, bool is_dst)
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{
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u16 val = swreg_value(reg);
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switch (swreg_type(reg)) {
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case NN_REG_GPR_A:
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case NN_REG_GPR_B:
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case NN_REG_GPR_BOTH:
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return val;
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case NN_REG_NNR:
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return UR_REG_NN | val;
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case NN_REG_XFER:
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return UR_REG_XFR | val;
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case NN_REG_IMM:
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if (val & ~0xff) {
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pr_err("immediate too large\n");
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return 0;
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}
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return UR_REG_IMM_encode(val);
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case NN_REG_NONE:
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return is_dst ? UR_REG_NO_DST : REG_NONE;
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}
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pr_err("unrecognized reg encoding %08x\n", reg);
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return 0;
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}
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int swreg_to_unrestricted(swreg dst, swreg lreg, swreg rreg,
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struct nfp_insn_ur_regs *reg)
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{
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memset(reg, 0, sizeof(*reg));
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/* Decode destination */
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if (swreg_type(dst) == NN_REG_IMM)
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return -EFAULT;
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if (swreg_type(dst) == NN_REG_GPR_B)
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reg->dst_ab = ALU_DST_B;
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if (swreg_type(dst) == NN_REG_GPR_BOTH)
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reg->wr_both = true;
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reg->dst = nfp_swreg_to_unreg(dst, true);
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/* Decode source operands */
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if (swreg_type(lreg) == swreg_type(rreg))
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return -EFAULT;
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if (swreg_type(lreg) == NN_REG_GPR_B ||
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swreg_type(rreg) == NN_REG_GPR_A) {
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reg->areg = nfp_swreg_to_unreg(rreg, false);
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reg->breg = nfp_swreg_to_unreg(lreg, false);
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reg->swap = true;
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} else {
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reg->areg = nfp_swreg_to_unreg(lreg, false);
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reg->breg = nfp_swreg_to_unreg(rreg, false);
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}
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return 0;
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}
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static u16 nfp_swreg_to_rereg(swreg reg, bool is_dst, bool has_imm8, bool *i8)
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{
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u16 val = swreg_value(reg);
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switch (swreg_type(reg)) {
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case NN_REG_GPR_A:
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case NN_REG_GPR_B:
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case NN_REG_GPR_BOTH:
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return val;
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case NN_REG_XFER:
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return RE_REG_XFR | val;
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case NN_REG_IMM:
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if (val & ~(0x7f | has_imm8 << 7)) {
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pr_err("immediate too large\n");
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return 0;
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}
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*i8 = val & 0x80;
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return RE_REG_IMM_encode(val & 0x7f);
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case NN_REG_NONE:
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return is_dst ? RE_REG_NO_DST : REG_NONE;
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case NN_REG_NNR:
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pr_err("NNRs used with restricted encoding\n");
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return 0;
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}
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pr_err("unrecognized reg encoding\n");
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return 0;
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}
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int swreg_to_restricted(swreg dst, swreg lreg, swreg rreg,
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struct nfp_insn_re_regs *reg, bool has_imm8)
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{
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memset(reg, 0, sizeof(*reg));
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/* Decode destination */
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if (swreg_type(dst) == NN_REG_IMM)
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return -EFAULT;
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if (swreg_type(dst) == NN_REG_GPR_B)
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reg->dst_ab = ALU_DST_B;
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if (swreg_type(dst) == NN_REG_GPR_BOTH)
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reg->wr_both = true;
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reg->dst = nfp_swreg_to_rereg(dst, true, false, NULL);
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/* Decode source operands */
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if (swreg_type(lreg) == swreg_type(rreg))
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return -EFAULT;
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if (swreg_type(lreg) == NN_REG_GPR_B ||
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swreg_type(rreg) == NN_REG_GPR_A) {
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reg->areg = nfp_swreg_to_rereg(rreg, false, has_imm8, ®->i8);
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reg->breg = nfp_swreg_to_rereg(lreg, false, has_imm8, ®->i8);
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reg->swap = true;
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} else {
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reg->areg = nfp_swreg_to_rereg(lreg, false, has_imm8, ®->i8);
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reg->breg = nfp_swreg_to_rereg(rreg, false, has_imm8, ®->i8);
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}
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return 0;
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}
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@ -205,6 +205,8 @@ enum cmd_tgt_map {
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__CMD_TGT_MAP_SIZE,
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};
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extern const struct cmd_tgt_act cmd_tgt_act[__CMD_TGT_MAP_SIZE];
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enum cmd_mode {
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CMD_MODE_40b_AB = 0,
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CMD_MODE_40b_BA = 1,
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@ -275,4 +277,26 @@ static inline u16 swreg_value(swreg reg)
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return FIELD_GET(NN_REG_VAL, swreg_raw(reg));
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}
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struct nfp_insn_ur_regs {
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enum alu_dst_ab dst_ab;
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u16 dst;
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u16 areg, breg;
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bool swap;
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bool wr_both;
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};
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struct nfp_insn_re_regs {
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enum alu_dst_ab dst_ab;
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u8 dst;
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u8 areg, breg;
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bool swap;
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bool wr_both;
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bool i8;
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};
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int swreg_to_unrestricted(swreg dst, swreg lreg, swreg rreg,
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struct nfp_insn_ur_regs *reg);
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int swreg_to_restricted(swreg dst, swreg lreg, swreg rreg,
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struct nfp_insn_re_regs *reg, bool has_imm8);
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#endif
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