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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-28 11:18:45 +07:00
drm/amdkfd: Simplify the mmap offset related bit operations
The new code uses straightforward bit shifts and thus has better readability. Signed-off-by: Yong Zhao <Yong.Zhao@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -296,7 +296,6 @@ static int kfd_ioctl_create_queue(struct file *filep, struct kfd_process *p,
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/* Return gpu_id as doorbell offset for mmap usage */
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args->doorbell_offset = KFD_MMAP_TYPE_DOORBELL;
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args->doorbell_offset |= KFD_MMAP_GPU_ID(args->gpu_id);
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args->doorbell_offset <<= PAGE_SHIFT;
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if (KFD_IS_SOC15(dev->device_info->asic_family))
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/* On SOC15 ASICs, doorbell allocation must be
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* per-device, and independent from the per-process
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@ -1312,10 +1311,9 @@ static int kfd_ioctl_alloc_memory_of_gpu(struct file *filep,
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/* MMIO is mapped through kfd device
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* Generate a kfd mmap offset
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*/
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if (flags & KFD_IOC_ALLOC_MEM_FLAGS_MMIO_REMAP) {
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args->mmap_offset = KFD_MMAP_TYPE_MMIO | KFD_MMAP_GPU_ID(args->gpu_id);
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args->mmap_offset <<= PAGE_SHIFT;
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}
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if (flags & KFD_IOC_ALLOC_MEM_FLAGS_MMIO_REMAP)
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args->mmap_offset = KFD_MMAP_TYPE_MMIO
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| KFD_MMAP_GPU_ID(args->gpu_id);
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return 0;
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@ -1899,20 +1897,19 @@ static int kfd_mmap(struct file *filp, struct vm_area_struct *vma)
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{
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struct kfd_process *process;
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struct kfd_dev *dev = NULL;
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unsigned long vm_pgoff;
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unsigned long mmap_offset;
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unsigned int gpu_id;
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process = kfd_get_process(current);
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if (IS_ERR(process))
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return PTR_ERR(process);
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vm_pgoff = vma->vm_pgoff;
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vma->vm_pgoff = KFD_MMAP_OFFSET_VALUE_GET(vm_pgoff);
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gpu_id = KFD_MMAP_GPU_ID_GET(vm_pgoff);
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mmap_offset = vma->vm_pgoff << PAGE_SHIFT;
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gpu_id = KFD_MMAP_GET_GPU_ID(mmap_offset);
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if (gpu_id)
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dev = kfd_device_by_id(gpu_id);
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switch (vm_pgoff & KFD_MMAP_TYPE_MASK) {
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switch (mmap_offset & KFD_MMAP_TYPE_MASK) {
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case KFD_MMAP_TYPE_DOORBELL:
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if (!dev)
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return -ENODEV;
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@ -346,7 +346,6 @@ int kfd_event_create(struct file *devkfd, struct kfd_process *p,
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ret = create_signal_event(devkfd, p, ev);
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if (!ret) {
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*event_page_offset = KFD_MMAP_TYPE_EVENTS;
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*event_page_offset <<= PAGE_SHIFT;
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*event_slot_index = ev->event_id;
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}
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break;
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@ -59,24 +59,21 @@
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* NOTE: struct vm_area_struct.vm_pgoff uses offset in pages. Hence, these
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* defines are w.r.t to PAGE_SIZE
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*/
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#define KFD_MMAP_TYPE_SHIFT (62 - PAGE_SHIFT)
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#define KFD_MMAP_TYPE_SHIFT 62
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#define KFD_MMAP_TYPE_MASK (0x3ULL << KFD_MMAP_TYPE_SHIFT)
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#define KFD_MMAP_TYPE_DOORBELL (0x3ULL << KFD_MMAP_TYPE_SHIFT)
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#define KFD_MMAP_TYPE_EVENTS (0x2ULL << KFD_MMAP_TYPE_SHIFT)
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#define KFD_MMAP_TYPE_RESERVED_MEM (0x1ULL << KFD_MMAP_TYPE_SHIFT)
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#define KFD_MMAP_TYPE_MMIO (0x0ULL << KFD_MMAP_TYPE_SHIFT)
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#define KFD_MMAP_GPU_ID_SHIFT (46 - PAGE_SHIFT)
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#define KFD_MMAP_GPU_ID_SHIFT 46
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#define KFD_MMAP_GPU_ID_MASK (((1ULL << KFD_GPU_ID_HASH_WIDTH) - 1) \
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<< KFD_MMAP_GPU_ID_SHIFT)
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#define KFD_MMAP_GPU_ID(gpu_id) ((((uint64_t)gpu_id) << KFD_MMAP_GPU_ID_SHIFT)\
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& KFD_MMAP_GPU_ID_MASK)
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#define KFD_MMAP_GPU_ID_GET(offset) ((offset & KFD_MMAP_GPU_ID_MASK) \
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#define KFD_MMAP_GET_GPU_ID(offset) ((offset & KFD_MMAP_GPU_ID_MASK) \
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>> KFD_MMAP_GPU_ID_SHIFT)
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#define KFD_MMAP_OFFSET_VALUE_MASK (0x3FFFFFFFFFFFULL >> PAGE_SHIFT)
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#define KFD_MMAP_OFFSET_VALUE_GET(offset) (offset & KFD_MMAP_OFFSET_VALUE_MASK)
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/*
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* When working with cp scheduler we should assign the HIQ manually or via
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* the amdgpu driver to a fixed hqd slot, here are the fixed HIQ hqd slot
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@ -560,8 +560,7 @@ static int kfd_process_init_cwsr_apu(struct kfd_process *p, struct file *filep)
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if (!dev->cwsr_enabled || qpd->cwsr_kaddr || qpd->cwsr_base)
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continue;
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offset = (KFD_MMAP_TYPE_RESERVED_MEM | KFD_MMAP_GPU_ID(dev->id))
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<< PAGE_SHIFT;
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offset = KFD_MMAP_TYPE_RESERVED_MEM | KFD_MMAP_GPU_ID(dev->id);
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qpd->tba_addr = (int64_t)vm_mmap(filep, 0,
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KFD_CWSR_TBA_TMA_SIZE, PROT_READ | PROT_EXEC,
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MAP_SHARED, offset);
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