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Pin control fixes for the v4.20 series:
- A bunch of meson fixes for this (Allwinner) platform. - Establish a git repo for Intel pin control in MAINTAINERS. -----BEGIN PGP SIGNATURE----- iQIcBAABAgAGBQJb7S1qAAoJEEEQszewGV1zbi8QAIDFNEGDWx2zU1tUhkm52Bne Lzw3oVP3oGPAYg/m7Amw/rFVbpM8nxkDdAImwZ59L4I/hQxYl1X83Qd/fHxMqNo2 335mHqC6MP4zofdlVWxgLQYOadCKnNruUgL22ZIBSH3Arzl8bzRN2nG0E/3dXi5L mU78KxvTp2xUPryHppOP8VcKMt3rh5jg24kPZamwXfLlbNVV/dTLBecBZz2kYrTP GccX7LM8cu0ldFwPotXtOMoo6GlszVhv8QzObLYsxrgOjnrGbomKTCrHxxQ02+/f HBeVE4bM2cD2heKHQusxQvwN7dsK2vRu+diLXEOLxq12SYaok0WugJNlPqN3t40O RBFmiBVsQL1EfYKz85HGO/eCLsaGqQDX4Br401v0Bsq5zHhqFOycNkDrAGg1UJX8 fOKMjgajoyobsaV+GIaXinhXewoATmnvvL0w1yc9YK+AdIrDtGpUQxT9YqN/4Jhl k+GNdSHrH/9EugkwRk7yQUqRjMtELVPlaqSozsVekk0OSFHv8Xe4TqakiyxcKDnR r+vh7XRq2rBjXgnfFfRljf4k4cDvsOQ/ON+cOqZBsnD+HrCvTSbzXN4jgnq3Jrmv YhlRDkRJFrflmm+WE0eL2jx8iDPtS6+qNB4Yceww3lmlP1VmdK1dvrKoyc6Qyo6y LD6uBaBY6Eig08TIDQFZ =1FKi -----END PGP SIGNATURE----- Merge tag 'pinctrl-v4.20-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control fixes from Linus Walleij: - A bunch of fixes for the Allwinner meson platform - Establish a git repo for Intel pin control in MAINTAINERS * tag 'pinctrl-v4.20-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: MAINTAINERS: Add tree link for Intel pin control driver pinctrl: meson: fix meson8b ao pull register bits pinctrl: meson: fix meson8 ao pull register bits pinctrl: meson: fix gxl ao pull register bits pinctrl: meson: fix gxbb ao pull register bits pinctrl: meson: fix pinconf bias disable
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commit
282fd2a2ad
@ -11745,6 +11745,7 @@ F: Documentation/devicetree/bindings/pinctrl/fsl,*
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PIN CONTROLLER - INTEL
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M: Mika Westerberg <mika.westerberg@linux.intel.com>
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M: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
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T: git git://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/intel.git
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S: Maintained
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F: drivers/pinctrl/intel/
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@ -830,7 +830,7 @@ static struct meson_bank meson_gxbb_periphs_banks[] = {
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static struct meson_bank meson_gxbb_aobus_banks[] = {
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/* name first last irq pullen pull dir out in */
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BANK("AO", GPIOAO_0, GPIOAO_13, 0, 13, 0, 0, 0, 16, 0, 0, 0, 16, 1, 0),
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BANK("AO", GPIOAO_0, GPIOAO_13, 0, 13, 0, 16, 0, 0, 0, 0, 0, 16, 1, 0),
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};
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static struct meson_pinctrl_data meson_gxbb_periphs_pinctrl_data = {
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@ -807,7 +807,7 @@ static struct meson_bank meson_gxl_periphs_banks[] = {
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static struct meson_bank meson_gxl_aobus_banks[] = {
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/* name first last irq pullen pull dir out in */
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BANK("AO", GPIOAO_0, GPIOAO_9, 0, 9, 0, 0, 0, 16, 0, 0, 0, 16, 1, 0),
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BANK("AO", GPIOAO_0, GPIOAO_9, 0, 9, 0, 16, 0, 0, 0, 0, 0, 16, 1, 0),
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};
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static struct meson_pinctrl_data meson_gxl_periphs_pinctrl_data = {
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@ -192,7 +192,7 @@ static int meson_pinconf_set(struct pinctrl_dev *pcdev, unsigned int pin,
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dev_dbg(pc->dev, "pin %u: disable bias\n", pin);
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meson_calc_reg_and_bit(bank, pin, REG_PULL, ®, &bit);
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ret = regmap_update_bits(pc->reg_pull, reg,
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ret = regmap_update_bits(pc->reg_pullen, reg,
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BIT(bit), 0);
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if (ret)
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return ret;
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@ -1053,7 +1053,7 @@ static struct meson_bank meson8_cbus_banks[] = {
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static struct meson_bank meson8_aobus_banks[] = {
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/* name first last irq pullen pull dir out in */
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BANK("AO", GPIOAO_0, GPIO_TEST_N, 0, 13, 0, 0, 0, 16, 0, 0, 0, 16, 1, 0),
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BANK("AO", GPIOAO_0, GPIO_TEST_N, 0, 13, 0, 16, 0, 0, 0, 0, 0, 16, 1, 0),
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};
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static struct meson_pinctrl_data meson8_cbus_pinctrl_data = {
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@ -906,7 +906,7 @@ static struct meson_bank meson8b_cbus_banks[] = {
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static struct meson_bank meson8b_aobus_banks[] = {
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/* name first lastc irq pullen pull dir out in */
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BANK("AO", GPIOAO_0, GPIO_TEST_N, 0, 13, 0, 0, 0, 16, 0, 0, 0, 16, 1, 0),
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BANK("AO", GPIOAO_0, GPIO_TEST_N, 0, 13, 0, 16, 0, 0, 0, 0, 0, 16, 1, 0),
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};
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static struct meson_pinctrl_data meson8b_cbus_pinctrl_data = {
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