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ath9k: Remove unused AR9462 2.0 initvals
Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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@ -33,13 +33,6 @@ static const u32 ar9462_modes_fast_clock_2p0[][3] = {
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{0x0000a254, 0x00000898, 0x00001130},
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};
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static const u32 ar9462_pciephy_clkreq_enable_L1_2p0[][2] = {
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/* Addr allmodes */
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{0x00018c00, 0x18253ede},
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{0x00018c04, 0x000801d8},
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{0x00018c08, 0x0003780c},
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};
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static const u32 ar9462_2p0_baseband_postamble[][5] = {
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/* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
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{0x00009810, 0xd00a8005, 0xd00a8005, 0xd00a8011, 0xd00a800d},
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@ -366,13 +359,6 @@ static const u32 ar9462_pciephy_clkreq_disable_L1_2p0[][2] = {
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{0x00018c08, 0x0003780c},
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};
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static const u32 ar9462_pciephy_pll_on_clkreq_disable_L1_2p0[][2] = {
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/* Addr allmodes */
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{0x00018c00, 0x18212ede},
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{0x00018c04, 0x000801d8},
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{0x00018c08, 0x0003780c},
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};
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static const u32 ar9462_2p0_radio_postamble_sys2ant[][5] = {
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/* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
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{0x000160ac, 0xa4646c08, 0xa4646c08, 0x24645808, 0x24645808},
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