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KVM: arm64: vgic-v3: KVM_DEV_ARM_VGIC_SAVE_PENDING_TABLES
This patch adds a new attribute to GICV3 KVM device KVM_DEV_ARM_VGIC_GRP_CTRL group. This allows userspace to flush all GICR pending tables into guest RAM. Signed-off-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Christoffer Dall <cdall@linaro.org> Acked-by: Marc Zyngier <marc.zyngier@arm.com>
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@ -204,6 +204,7 @@ struct kvm_arch_memory_slot {
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#define KVM_DEV_ARM_VGIC_CTRL_INIT 0
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#define KVM_DEV_ARM_ITS_SAVE_TABLES 1
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#define KVM_DEV_ARM_ITS_RESTORE_TABLES 2
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#define KVM_DEV_ARM_VGIC_SAVE_PENDING_TABLES 3
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/* KVM_IRQ_LINE irq field index values */
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#define KVM_ARM_IRQ_TYPE_SHIFT 24
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@ -224,6 +224,7 @@ struct kvm_arch_memory_slot {
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#define KVM_DEV_ARM_VGIC_CTRL_INIT 0
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#define KVM_DEV_ARM_ITS_SAVE_TABLES 1
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#define KVM_DEV_ARM_ITS_RESTORE_TABLES 2
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#define KVM_DEV_ARM_VGIC_SAVE_PENDING_TABLES 3
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/* Device Control API on vcpu fd */
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#define KVM_ARM_VCPU_PMU_V3_CTRL 0
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@ -580,6 +580,24 @@ static int vgic_v3_set_attr(struct kvm_device *dev,
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reg = tmp32;
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return vgic_v3_attr_regs_access(dev, attr, ®, true);
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}
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case KVM_DEV_ARM_VGIC_GRP_CTRL: {
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int ret;
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switch (attr->attr) {
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case KVM_DEV_ARM_VGIC_SAVE_PENDING_TABLES:
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mutex_lock(&dev->kvm->lock);
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if (!lock_all_vcpus(dev->kvm)) {
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mutex_unlock(&dev->kvm->lock);
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return -EBUSY;
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}
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ret = vgic_v3_save_pending_tables(dev->kvm);
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unlock_all_vcpus(dev->kvm);
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mutex_unlock(&dev->kvm->lock);
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return ret;
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}
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break;
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}
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}
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return -ENXIO;
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}
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@ -658,6 +676,8 @@ static int vgic_v3_has_attr(struct kvm_device *dev,
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switch (attr->attr) {
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case KVM_DEV_ARM_VGIC_CTRL_INIT:
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return 0;
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case KVM_DEV_ARM_VGIC_SAVE_PENDING_TABLES:
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return 0;
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}
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}
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return -ENXIO;
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@ -278,6 +278,57 @@ int vgic_v3_lpi_sync_pending_status(struct kvm *kvm, struct vgic_irq *irq)
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return 0;
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}
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/**
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* vgic_its_save_pending_tables - Save the pending tables into guest RAM
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* kvm lock and all vcpu lock must be held
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*/
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int vgic_v3_save_pending_tables(struct kvm *kvm)
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{
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struct vgic_dist *dist = &kvm->arch.vgic;
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int last_byte_offset = -1;
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struct vgic_irq *irq;
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int ret;
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list_for_each_entry(irq, &dist->lpi_list_head, lpi_list) {
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int byte_offset, bit_nr;
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struct kvm_vcpu *vcpu;
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gpa_t pendbase, ptr;
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bool stored;
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u8 val;
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vcpu = irq->target_vcpu;
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if (!vcpu)
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continue;
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pendbase = GICR_PENDBASER_ADDRESS(vcpu->arch.vgic_cpu.pendbaser);
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byte_offset = irq->intid / BITS_PER_BYTE;
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bit_nr = irq->intid % BITS_PER_BYTE;
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ptr = pendbase + byte_offset;
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if (byte_offset != last_byte_offset) {
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ret = kvm_read_guest(kvm, ptr, &val, 1);
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if (ret)
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return ret;
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last_byte_offset = byte_offset;
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}
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stored = val & (1U << bit_nr);
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if (stored == irq->pending_latch)
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continue;
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if (irq->pending_latch)
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val |= 1 << bit_nr;
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else
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val &= ~(1 << bit_nr);
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ret = kvm_write_guest(kvm, ptr, &val, 1);
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if (ret)
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return ret;
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}
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return 0;
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}
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/* check for overlapping regions and for regions crossing the end of memory */
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static bool vgic_v3_check_base(struct kvm *kvm)
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{
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@ -173,6 +173,7 @@ void vgic_v3_enable(struct kvm_vcpu *vcpu);
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int vgic_v3_probe(const struct gic_kvm_info *info);
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int vgic_v3_map_resources(struct kvm *kvm);
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int vgic_v3_lpi_sync_pending_status(struct kvm *kvm, struct vgic_irq *irq);
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int vgic_v3_save_pending_tables(struct kvm *kvm);
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int vgic_register_redist_iodevs(struct kvm *kvm, gpa_t dist_base_address);
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void vgic_v3_load(struct kvm_vcpu *vcpu);
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