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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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Merge master.kernel.org:/home/rmk/linux-2.6-serial
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commit
27266a18dc
@ -439,6 +439,20 @@ static int pci_siig_init(struct pci_dev *dev)
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return -ENODEV;
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}
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static int pci_siig_setup(struct serial_private *priv,
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struct pciserial_board *board,
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struct uart_port *port, int idx)
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{
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unsigned int bar = FL_GET_BASE(board->flags) + idx, offset = 0;
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if (idx > 3) {
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bar = 4;
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offset = (idx - 4) * 8;
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}
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return setup_port(priv, port, bar, offset, 0);
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}
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/*
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* Timedia has an explosion of boards, and to avoid the PCI table from
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* growing *huge*, we use this function to collapse some 70 entries
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@ -748,7 +762,7 @@ static struct pci_serial_quirk pci_serial_quirks[] = {
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.subvendor = PCI_ANY_ID,
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.subdevice = PCI_ANY_ID,
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.init = pci_siig_init,
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.setup = pci_default_setup,
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.setup = pci_siig_setup,
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},
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/*
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* Titan cards
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@ -2141,6 +2155,15 @@ static struct pci_device_id serial_pci_tbl[] = {
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{ PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_4S_20x_850,
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PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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pbn_b0_bt_4_921600 },
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{ PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_8S_20x_550,
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PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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pbn_b0_bt_8_921600 },
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{ PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_8S_20x_650,
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PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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pbn_b0_bt_8_921600 },
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{ PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_8S_20x_850,
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PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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pbn_b0_bt_8_921600 },
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/*
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* Computone devices submitted by Doug McNash dmcnash@computone.com
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@ -98,6 +98,7 @@ config SERIAL_8250_NR_UARTS
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config SERIAL_8250_RUNTIME_UARTS
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int "Number of 8250/16550 serial ports to register at runtime"
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depends on SERIAL_8250
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range 0 SERIAL_8250_NR_UARTS
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default "4"
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help
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Set this to the maximum number of serial ports you want
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@ -2237,7 +2237,7 @@ int uart_add_one_port(struct uart_driver *drv, struct uart_port *port)
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* If this port is a console, then the spinlock is already
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* initialised.
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*/
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if (!uart_console(port))
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if (!(uart_console(port) && (port->cons->flags & CON_ENABLED)))
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spin_lock_init(&port->lock);
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uart_configure_port(drv, state, port);
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@ -1670,6 +1670,9 @@
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#define PCI_DEVICE_ID_SIIG_2S1P_20x_550 0x2060
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#define PCI_DEVICE_ID_SIIG_2S1P_20x_650 0x2061
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#define PCI_DEVICE_ID_SIIG_2S1P_20x_850 0x2062
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#define PCI_DEVICE_ID_SIIG_8S_20x_550 0x2080
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#define PCI_DEVICE_ID_SIIG_8S_20x_650 0x2081
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#define PCI_DEVICE_ID_SIIG_8S_20x_850 0x2082
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#define PCI_SUBDEVICE_ID_SIIG_QUARTET_SERIAL 0x2050
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#define PCI_VENDOR_ID_RADISYS 0x1331
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