mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-14 23:26:39 +07:00
* i31200_edac: Add Kabylake support (Jason Baron)
* sb_edac: resolve memory controller detection issues on asymmetric
setups with not all DIMM slots being populated (Tony Luck and Qiuxu Zhuo)
* misc cleanups and fixlets all over
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Merge tag 'edac_for_4.13' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp
Pull EDAC updates from Borislav Petkov:
"Nothing earth-shattering - just the normal development flow of
cleanups, improvements, fixes and such.
Summary:
- i31200_edac: Add Kabylake support (Jason Baron)
- sb_edac: resolve memory controller detection issues on asymmetric
setups with not all DIMM slots being populated (Tony Luck and Qiuxu
Zhuo)
- misc cleanups and fixlets all over"
* tag 'edac_for_4.13' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp: (22 commits)
EDAC, pnd2: Fix Apollo Lake DIMM detection
EDAC, i5000, i5400: Fix definition of NRECMEMB register
EDAC, pnd2: Make function sbi_send() static
EDAC, pnd2: Return proper error value from apl_rd_reg()
EDAC, altera: Simplify calculation of total memory
EDAC, sb_edac: Avoid creating SOCK memory controller
EDAC, mce_amd: Fix typo in SMCA error description
EDAC, mv64x60: Sanity check edac_op_state before registering
EDAC, thunderx: Fix a warning during l2c debugfs node creation
EDAC, mv64x60: Check driver registration success
EDAC, ie31200: Add Intel Kaby Lake CPU support
EDAC, mv64x60: Replace in_le32()/out_le32() with readl()/writel()
EDAC, mv64x60: Fix pdata->name
EDAC, sb_edac: Bump driver version and do some cleanups
EDAC, sb_edac: Check if ECC enabled when at least one DIMM is present
EDAC, sb_edac: Drop NUM_CHANNELS from 8 back to 4
EDAC, sb_edac: Carve out dimm-populating loop
EDAC, sb_edac: Fix mod_name
EDAC, sb_edac: Assign EDAC memory controller per h/w controller
EDAC, sb_edac: Don't use "Socket#" in the memory controller name
...
This commit is contained in:
Linus Torvalds
commit
26d3a77d2c
@ -214,24 +214,16 @@ static void altr_sdr_mc_create_debugfs_nodes(struct mem_ctl_info *mci)
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static unsigned long get_total_mem(void)
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{
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struct device_node *np = NULL;
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const unsigned int *reg, *reg_end;
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int len, sw, aw;
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unsigned long start, size, total_mem = 0;
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struct resource res;
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int ret;
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unsigned long total_mem = 0;
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for_each_node_by_type(np, "memory") {
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aw = of_n_addr_cells(np);
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sw = of_n_size_cells(np);
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reg = (const unsigned int *)of_get_property(np, "reg", &len);
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reg_end = reg + (len / sizeof(u32));
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ret = of_address_to_resource(np, 0, &res);
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if (ret)
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continue;
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total_mem = 0;
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do {
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start = of_read_number(reg, aw);
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reg += aw;
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size = of_read_number(reg, sw);
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reg += sw;
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total_mem += size;
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} while (reg < reg_end);
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total_mem += resource_size(&res);
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}
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edac_dbg(0, "total_mem 0x%lx\n", total_mem);
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return total_mem;
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@ -1839,7 +1831,7 @@ static int a10_eccmgr_irqdomain_map(struct irq_domain *d, unsigned int irq,
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return 0;
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}
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static struct irq_domain_ops a10_eccmgr_ic_ops = {
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static const struct irq_domain_ops a10_eccmgr_ic_ops = {
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.map = a10_eccmgr_irqdomain_map,
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.xlate = irq_domain_xlate_twocell,
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};
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@ -227,7 +227,7 @@
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#define NREC_RDWR(x) (((x)>>11) & 1)
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#define NREC_RANK(x) (((x)>>8) & 0x7)
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#define NRECMEMB 0xC0
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#define NREC_CAS(x) (((x)>>16) & 0xFFFFFF)
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#define NREC_CAS(x) (((x)>>16) & 0xFFF)
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#define NREC_RAS(x) ((x) & 0x7FFF)
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#define NRECFGLOG 0xC4
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#define NREEECFBDA 0xC8
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@ -371,7 +371,7 @@ struct i5000_error_info {
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/* These registers are input ONLY if there was a
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* Non-Recoverable Error */
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u16 nrecmema; /* Non-Recoverable Mem log A */
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u16 nrecmemb; /* Non-Recoverable Mem log B */
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u32 nrecmemb; /* Non-Recoverable Mem log B */
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};
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@ -407,7 +407,7 @@ static void i5000_get_error_info(struct mem_ctl_info *mci,
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NERR_FAT_FBD, &info->nerr_fat_fbd);
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pci_read_config_word(pvt->branchmap_werrors,
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NRECMEMA, &info->nrecmema);
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pci_read_config_word(pvt->branchmap_werrors,
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pci_read_config_dword(pvt->branchmap_werrors,
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NRECMEMB, &info->nrecmemb);
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/* Clear the error bits, by writing them back */
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@ -368,7 +368,7 @@ struct i5400_error_info {
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/* These registers are input ONLY if there was a Non-Rec Error */
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u16 nrecmema; /* Non-Recoverable Mem log A */
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u16 nrecmemb; /* Non-Recoverable Mem log B */
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u32 nrecmemb; /* Non-Recoverable Mem log B */
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};
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@ -458,7 +458,7 @@ static void i5400_get_error_info(struct mem_ctl_info *mci,
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NERR_FAT_FBD, &info->nerr_fat_fbd);
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pci_read_config_word(pvt->branchmap_werrors,
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NRECMEMA, &info->nrecmema);
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pci_read_config_word(pvt->branchmap_werrors,
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pci_read_config_dword(pvt->branchmap_werrors,
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NRECMEMB, &info->nrecmemb);
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/* Clear the error bits, by writing them back */
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@ -18,10 +18,12 @@
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* 0c04: Xeon E3-1200 v3/4th Gen Core Processor DRAM Controller
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* 0c08: Xeon E3-1200 v3 Processor DRAM Controller
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* 1918: Xeon E3-1200 v5 Skylake Host Bridge/DRAM Registers
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* 5918: Xeon E3-1200 Xeon E3-1200 v6/7th Gen Core Processor Host Bridge/DRAM Registers
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*
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* Based on Intel specification:
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* http://www.intel.com/content/dam/www/public/us/en/documents/datasheets/xeon-e3-1200v3-vol-2-datasheet.pdf
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* http://www.intel.com/content/www/us/en/processors/xeon/xeon-e3-1200-family-vol-2-datasheet.html
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* http://www.intel.com/content/www/us/en/processors/core/7th-gen-core-family-mobile-h-processor-lines-datasheet-vol-2.html
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*
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* According to the above datasheet (p.16):
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* "
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@ -57,6 +59,7 @@
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#define PCI_DEVICE_ID_INTEL_IE31200_HB_6 0x0c04
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#define PCI_DEVICE_ID_INTEL_IE31200_HB_7 0x0c08
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#define PCI_DEVICE_ID_INTEL_IE31200_HB_8 0x1918
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#define PCI_DEVICE_ID_INTEL_IE31200_HB_9 0x5918
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#define IE31200_DIMMS 4
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#define IE31200_RANKS 8
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@ -376,7 +379,12 @@ static int ie31200_probe1(struct pci_dev *pdev, int dev_idx)
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void __iomem *window;
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struct ie31200_priv *priv;
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u32 addr_decode, mad_offset;
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bool skl = (pdev->device == PCI_DEVICE_ID_INTEL_IE31200_HB_8);
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/*
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* Kaby Lake seems to work like Skylake. Please re-visit this logic
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* when adding new CPU support.
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*/
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bool skl = (pdev->device >= PCI_DEVICE_ID_INTEL_IE31200_HB_8);
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edac_dbg(0, "MC:\n");
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@ -559,6 +567,9 @@ static const struct pci_device_id ie31200_pci_tbl[] = {
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{
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PCI_VEND_DEV(INTEL, IE31200_HB_8), PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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IE31200},
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{
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PCI_VEND_DEV(INTEL, IE31200_HB_9), PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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IE31200},
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{
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0,
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} /* 0 terminated list. */
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@ -161,7 +161,7 @@ static const char * const smca_ls_mce_desc[] = {
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"Sys Read data error thread 0",
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"Sys read data error thread 1",
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"DC tag error type 2",
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"DC data error type 1 (poison comsumption)",
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"DC data error type 1 (poison consumption)",
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"DC data error type 2",
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"DC data error type 3",
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"DC tag error type 4",
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@ -32,21 +32,21 @@ static void mv64x60_pci_check(struct edac_pci_ctl_info *pci)
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struct mv64x60_pci_pdata *pdata = pci->pvt_info;
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u32 cause;
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cause = in_le32(pdata->pci_vbase + MV64X60_PCI_ERROR_CAUSE);
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cause = readl(pdata->pci_vbase + MV64X60_PCI_ERROR_CAUSE);
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if (!cause)
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return;
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printk(KERN_ERR "Error in PCI %d Interface\n", pdata->pci_hose);
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printk(KERN_ERR "Cause register: 0x%08x\n", cause);
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printk(KERN_ERR "Address Low: 0x%08x\n",
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in_le32(pdata->pci_vbase + MV64X60_PCI_ERROR_ADDR_LO));
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readl(pdata->pci_vbase + MV64X60_PCI_ERROR_ADDR_LO));
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printk(KERN_ERR "Address High: 0x%08x\n",
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in_le32(pdata->pci_vbase + MV64X60_PCI_ERROR_ADDR_HI));
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readl(pdata->pci_vbase + MV64X60_PCI_ERROR_ADDR_HI));
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printk(KERN_ERR "Attribute: 0x%08x\n",
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in_le32(pdata->pci_vbase + MV64X60_PCI_ERROR_ATTR));
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readl(pdata->pci_vbase + MV64X60_PCI_ERROR_ATTR));
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printk(KERN_ERR "Command: 0x%08x\n",
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in_le32(pdata->pci_vbase + MV64X60_PCI_ERROR_CMD));
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out_le32(pdata->pci_vbase + MV64X60_PCI_ERROR_CAUSE, ~cause);
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readl(pdata->pci_vbase + MV64X60_PCI_ERROR_CMD));
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writel(~cause, pdata->pci_vbase + MV64X60_PCI_ERROR_CAUSE);
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if (cause & MV64X60_PCI_PE_MASK)
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edac_pci_handle_pe(pci, pci->ctl_name);
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@ -61,7 +61,7 @@ static irqreturn_t mv64x60_pci_isr(int irq, void *dev_id)
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struct mv64x60_pci_pdata *pdata = pci->pvt_info;
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u32 val;
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val = in_le32(pdata->pci_vbase + MV64X60_PCI_ERROR_CAUSE);
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val = readl(pdata->pci_vbase + MV64X60_PCI_ERROR_CAUSE);
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if (!val)
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return IRQ_NONE;
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@ -93,7 +93,7 @@ static int __init mv64x60_pci_fixup(struct platform_device *pdev)
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if (!pci_serr)
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return -ENOMEM;
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out_le32(pci_serr, in_le32(pci_serr) & ~0x1);
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writel(readl(pci_serr) & ~0x1, pci_serr);
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iounmap(pci_serr);
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return 0;
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@ -116,7 +116,7 @@ static int mv64x60_pci_err_probe(struct platform_device *pdev)
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pdata = pci->pvt_info;
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pdata->pci_hose = pdev->id;
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pdata->name = "mpc85xx_pci_err";
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pdata->name = "mv64x60_pci_err";
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platform_set_drvdata(pdev, pci);
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pci->dev = &pdev->dev;
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pci->dev_name = dev_name(&pdev->dev);
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@ -161,10 +161,10 @@ static int mv64x60_pci_err_probe(struct platform_device *pdev)
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goto err;
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}
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out_le32(pdata->pci_vbase + MV64X60_PCI_ERROR_CAUSE, 0);
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out_le32(pdata->pci_vbase + MV64X60_PCI_ERROR_MASK, 0);
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out_le32(pdata->pci_vbase + MV64X60_PCI_ERROR_MASK,
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MV64X60_PCIx_ERR_MASK_VAL);
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writel(0, pdata->pci_vbase + MV64X60_PCI_ERROR_CAUSE);
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writel(0, pdata->pci_vbase + MV64X60_PCI_ERROR_MASK);
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writel(MV64X60_PCIx_ERR_MASK_VAL,
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pdata->pci_vbase + MV64X60_PCI_ERROR_MASK);
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if (edac_pci_add_device(pci, pdata->edac_idx) > 0) {
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edac_dbg(3, "failed edac_pci_add_device()\n");
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@ -233,23 +233,23 @@ static void mv64x60_sram_check(struct edac_device_ctl_info *edac_dev)
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struct mv64x60_sram_pdata *pdata = edac_dev->pvt_info;
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u32 cause;
|
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|
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cause = in_le32(pdata->sram_vbase + MV64X60_SRAM_ERR_CAUSE);
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cause = readl(pdata->sram_vbase + MV64X60_SRAM_ERR_CAUSE);
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if (!cause)
|
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return;
|
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|
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printk(KERN_ERR "Error in internal SRAM\n");
|
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printk(KERN_ERR "Cause register: 0x%08x\n", cause);
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printk(KERN_ERR "Address Low: 0x%08x\n",
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in_le32(pdata->sram_vbase + MV64X60_SRAM_ERR_ADDR_LO));
|
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readl(pdata->sram_vbase + MV64X60_SRAM_ERR_ADDR_LO));
|
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printk(KERN_ERR "Address High: 0x%08x\n",
|
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in_le32(pdata->sram_vbase + MV64X60_SRAM_ERR_ADDR_HI));
|
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readl(pdata->sram_vbase + MV64X60_SRAM_ERR_ADDR_HI));
|
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printk(KERN_ERR "Data Low: 0x%08x\n",
|
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in_le32(pdata->sram_vbase + MV64X60_SRAM_ERR_DATA_LO));
|
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readl(pdata->sram_vbase + MV64X60_SRAM_ERR_DATA_LO));
|
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printk(KERN_ERR "Data High: 0x%08x\n",
|
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in_le32(pdata->sram_vbase + MV64X60_SRAM_ERR_DATA_HI));
|
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readl(pdata->sram_vbase + MV64X60_SRAM_ERR_DATA_HI));
|
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printk(KERN_ERR "Parity: 0x%08x\n",
|
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in_le32(pdata->sram_vbase + MV64X60_SRAM_ERR_PARITY));
|
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out_le32(pdata->sram_vbase + MV64X60_SRAM_ERR_CAUSE, 0);
|
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readl(pdata->sram_vbase + MV64X60_SRAM_ERR_PARITY));
|
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writel(0, pdata->sram_vbase + MV64X60_SRAM_ERR_CAUSE);
|
||||
|
||||
edac_device_handle_ue(edac_dev, 0, 0, edac_dev->ctl_name);
|
||||
}
|
||||
@ -260,7 +260,7 @@ static irqreturn_t mv64x60_sram_isr(int irq, void *dev_id)
|
||||
struct mv64x60_sram_pdata *pdata = edac_dev->pvt_info;
|
||||
u32 cause;
|
||||
|
||||
cause = in_le32(pdata->sram_vbase + MV64X60_SRAM_ERR_CAUSE);
|
||||
cause = readl(pdata->sram_vbase + MV64X60_SRAM_ERR_CAUSE);
|
||||
if (!cause)
|
||||
return IRQ_NONE;
|
||||
|
||||
@ -322,7 +322,7 @@ static int mv64x60_sram_err_probe(struct platform_device *pdev)
|
||||
}
|
||||
|
||||
/* setup SRAM err registers */
|
||||
out_le32(pdata->sram_vbase + MV64X60_SRAM_ERR_CAUSE, 0);
|
||||
writel(0, pdata->sram_vbase + MV64X60_SRAM_ERR_CAUSE);
|
||||
|
||||
edac_dev->mod_name = EDAC_MOD_STR;
|
||||
edac_dev->ctl_name = pdata->name;
|
||||
@ -398,7 +398,7 @@ static void mv64x60_cpu_check(struct edac_device_ctl_info *edac_dev)
|
||||
struct mv64x60_cpu_pdata *pdata = edac_dev->pvt_info;
|
||||
u32 cause;
|
||||
|
||||
cause = in_le32(pdata->cpu_vbase[1] + MV64x60_CPU_ERR_CAUSE) &
|
||||
cause = readl(pdata->cpu_vbase[1] + MV64x60_CPU_ERR_CAUSE) &
|
||||
MV64x60_CPU_CAUSE_MASK;
|
||||
if (!cause)
|
||||
return;
|
||||
@ -406,16 +406,16 @@ static void mv64x60_cpu_check(struct edac_device_ctl_info *edac_dev)
|
||||
printk(KERN_ERR "Error on CPU interface\n");
|
||||
printk(KERN_ERR "Cause register: 0x%08x\n", cause);
|
||||
printk(KERN_ERR "Address Low: 0x%08x\n",
|
||||
in_le32(pdata->cpu_vbase[0] + MV64x60_CPU_ERR_ADDR_LO));
|
||||
readl(pdata->cpu_vbase[0] + MV64x60_CPU_ERR_ADDR_LO));
|
||||
printk(KERN_ERR "Address High: 0x%08x\n",
|
||||
in_le32(pdata->cpu_vbase[0] + MV64x60_CPU_ERR_ADDR_HI));
|
||||
readl(pdata->cpu_vbase[0] + MV64x60_CPU_ERR_ADDR_HI));
|
||||
printk(KERN_ERR "Data Low: 0x%08x\n",
|
||||
in_le32(pdata->cpu_vbase[1] + MV64x60_CPU_ERR_DATA_LO));
|
||||
readl(pdata->cpu_vbase[1] + MV64x60_CPU_ERR_DATA_LO));
|
||||
printk(KERN_ERR "Data High: 0x%08x\n",
|
||||
in_le32(pdata->cpu_vbase[1] + MV64x60_CPU_ERR_DATA_HI));
|
||||
readl(pdata->cpu_vbase[1] + MV64x60_CPU_ERR_DATA_HI));
|
||||
printk(KERN_ERR "Parity: 0x%08x\n",
|
||||
in_le32(pdata->cpu_vbase[1] + MV64x60_CPU_ERR_PARITY));
|
||||
out_le32(pdata->cpu_vbase[1] + MV64x60_CPU_ERR_CAUSE, 0);
|
||||
readl(pdata->cpu_vbase[1] + MV64x60_CPU_ERR_PARITY));
|
||||
writel(0, pdata->cpu_vbase[1] + MV64x60_CPU_ERR_CAUSE);
|
||||
|
||||
edac_device_handle_ue(edac_dev, 0, 0, edac_dev->ctl_name);
|
||||
}
|
||||
@ -426,7 +426,7 @@ static irqreturn_t mv64x60_cpu_isr(int irq, void *dev_id)
|
||||
struct mv64x60_cpu_pdata *pdata = edac_dev->pvt_info;
|
||||
u32 cause;
|
||||
|
||||
cause = in_le32(pdata->cpu_vbase[1] + MV64x60_CPU_ERR_CAUSE) &
|
||||
cause = readl(pdata->cpu_vbase[1] + MV64x60_CPU_ERR_CAUSE) &
|
||||
MV64x60_CPU_CAUSE_MASK;
|
||||
if (!cause)
|
||||
return IRQ_NONE;
|
||||
@ -515,9 +515,9 @@ static int mv64x60_cpu_err_probe(struct platform_device *pdev)
|
||||
}
|
||||
|
||||
/* setup CPU err registers */
|
||||
out_le32(pdata->cpu_vbase[1] + MV64x60_CPU_ERR_CAUSE, 0);
|
||||
out_le32(pdata->cpu_vbase[1] + MV64x60_CPU_ERR_MASK, 0);
|
||||
out_le32(pdata->cpu_vbase[1] + MV64x60_CPU_ERR_MASK, 0x000000ff);
|
||||
writel(0, pdata->cpu_vbase[1] + MV64x60_CPU_ERR_CAUSE);
|
||||
writel(0, pdata->cpu_vbase[1] + MV64x60_CPU_ERR_MASK);
|
||||
writel(0x000000ff, pdata->cpu_vbase[1] + MV64x60_CPU_ERR_MASK);
|
||||
|
||||
edac_dev->mod_name = EDAC_MOD_STR;
|
||||
edac_dev->ctl_name = pdata->name;
|
||||
@ -596,13 +596,13 @@ static void mv64x60_mc_check(struct mem_ctl_info *mci)
|
||||
u32 comp_ecc;
|
||||
u32 syndrome;
|
||||
|
||||
reg = in_le32(pdata->mc_vbase + MV64X60_SDRAM_ERR_ADDR);
|
||||
reg = readl(pdata->mc_vbase + MV64X60_SDRAM_ERR_ADDR);
|
||||
if (!reg)
|
||||
return;
|
||||
|
||||
err_addr = reg & ~0x3;
|
||||
sdram_ecc = in_le32(pdata->mc_vbase + MV64X60_SDRAM_ERR_ECC_RCVD);
|
||||
comp_ecc = in_le32(pdata->mc_vbase + MV64X60_SDRAM_ERR_ECC_CALC);
|
||||
sdram_ecc = readl(pdata->mc_vbase + MV64X60_SDRAM_ERR_ECC_RCVD);
|
||||
comp_ecc = readl(pdata->mc_vbase + MV64X60_SDRAM_ERR_ECC_CALC);
|
||||
syndrome = sdram_ecc ^ comp_ecc;
|
||||
|
||||
/* first bit clear in ECC Err Reg, 1 bit error, correctable by HW */
|
||||
@ -620,7 +620,7 @@ static void mv64x60_mc_check(struct mem_ctl_info *mci)
|
||||
mci->ctl_name, "");
|
||||
|
||||
/* clear the error */
|
||||
out_le32(pdata->mc_vbase + MV64X60_SDRAM_ERR_ADDR, 0);
|
||||
writel(0, pdata->mc_vbase + MV64X60_SDRAM_ERR_ADDR);
|
||||
}
|
||||
|
||||
static irqreturn_t mv64x60_mc_isr(int irq, void *dev_id)
|
||||
@ -629,7 +629,7 @@ static irqreturn_t mv64x60_mc_isr(int irq, void *dev_id)
|
||||
struct mv64x60_mc_pdata *pdata = mci->pvt_info;
|
||||
u32 reg;
|
||||
|
||||
reg = in_le32(pdata->mc_vbase + MV64X60_SDRAM_ERR_ADDR);
|
||||
reg = readl(pdata->mc_vbase + MV64X60_SDRAM_ERR_ADDR);
|
||||
if (!reg)
|
||||
return IRQ_NONE;
|
||||
|
||||
@ -664,7 +664,7 @@ static void mv64x60_init_csrows(struct mem_ctl_info *mci,
|
||||
|
||||
get_total_mem(pdata);
|
||||
|
||||
ctl = in_le32(pdata->mc_vbase + MV64X60_SDRAM_CONFIG);
|
||||
ctl = readl(pdata->mc_vbase + MV64X60_SDRAM_CONFIG);
|
||||
|
||||
csrow = mci->csrows[0];
|
||||
dimm = csrow->channels[0]->dimm;
|
||||
@ -753,7 +753,7 @@ static int mv64x60_mc_err_probe(struct platform_device *pdev)
|
||||
goto err;
|
||||
}
|
||||
|
||||
ctl = in_le32(pdata->mc_vbase + MV64X60_SDRAM_CONFIG);
|
||||
ctl = readl(pdata->mc_vbase + MV64X60_SDRAM_CONFIG);
|
||||
if (!(ctl & MV64X60_SDRAM_ECC)) {
|
||||
/* Non-ECC RAM? */
|
||||
printk(KERN_WARNING "%s: No ECC DIMMs discovered\n", __func__);
|
||||
@ -779,10 +779,10 @@ static int mv64x60_mc_err_probe(struct platform_device *pdev)
|
||||
mv64x60_init_csrows(mci, pdata);
|
||||
|
||||
/* setup MC registers */
|
||||
out_le32(pdata->mc_vbase + MV64X60_SDRAM_ERR_ADDR, 0);
|
||||
ctl = in_le32(pdata->mc_vbase + MV64X60_SDRAM_ERR_ECC_CNTL);
|
||||
writel(0, pdata->mc_vbase + MV64X60_SDRAM_ERR_ADDR);
|
||||
ctl = readl(pdata->mc_vbase + MV64X60_SDRAM_ERR_ECC_CNTL);
|
||||
ctl = (ctl & 0xff00ffff) | 0x10000;
|
||||
out_le32(pdata->mc_vbase + MV64X60_SDRAM_ERR_ECC_CNTL, ctl);
|
||||
writel(ctl, pdata->mc_vbase + MV64X60_SDRAM_ERR_ECC_CNTL);
|
||||
|
||||
res = edac_mc_add_mc(mci);
|
||||
if (res) {
|
||||
@ -853,10 +853,10 @@ static struct platform_driver * const drivers[] = {
|
||||
|
||||
static int __init mv64x60_edac_init(void)
|
||||
{
|
||||
int ret = 0;
|
||||
|
||||
printk(KERN_INFO "Marvell MV64x60 EDAC driver " MV64x60_REVISION "\n");
|
||||
printk(KERN_INFO "\t(C) 2006-2007 MontaVista Software\n");
|
||||
|
||||
/* make sure error reporting method is sane */
|
||||
switch (edac_op_state) {
|
||||
case EDAC_OPSTATE_POLL:
|
||||
|
||||
@ -131,7 +131,7 @@ static struct mem_ctl_info *pnd2_mci;
|
||||
|
||||
#ifdef CONFIG_X86_INTEL_SBI_APL
|
||||
#include "linux/platform_data/sbi_apl.h"
|
||||
int sbi_send(int port, int off, int op, u32 *data)
|
||||
static int sbi_send(int port, int off, int op, u32 *data)
|
||||
{
|
||||
struct sbi_apl_message sbi_arg;
|
||||
int ret, read = 0;
|
||||
@ -160,7 +160,7 @@ int sbi_send(int port, int off, int op, u32 *data)
|
||||
return ret;
|
||||
}
|
||||
#else
|
||||
int sbi_send(int port, int off, int op, u32 *data)
|
||||
static int sbi_send(int port, int off, int op, u32 *data)
|
||||
{
|
||||
return -EUNATCH;
|
||||
}
|
||||
@ -168,14 +168,15 @@ int sbi_send(int port, int off, int op, u32 *data)
|
||||
|
||||
static int apl_rd_reg(int port, int off, int op, void *data, size_t sz, char *name)
|
||||
{
|
||||
int ret = 0;
|
||||
int ret = 0;
|
||||
|
||||
edac_dbg(2, "Read %s port=%x off=%x op=%x\n", name, port, off, op);
|
||||
switch (sz) {
|
||||
case 8:
|
||||
ret = sbi_send(port, off + 4, op, (u32 *)(data + 4));
|
||||
/* fall through */
|
||||
case 4:
|
||||
ret = sbi_send(port, off, op, (u32 *)data);
|
||||
ret |= sbi_send(port, off, op, (u32 *)data);
|
||||
pnd2_printk(KERN_DEBUG, "%s=%x%08x ret=%d\n", name,
|
||||
sz == 8 ? *((u32 *)(data + 4)) : 0, *((u32 *)data), ret);
|
||||
break;
|
||||
@ -423,16 +424,21 @@ static void dnv_mk_region(char *name, struct region *rp, void *asym)
|
||||
|
||||
static int apl_get_registers(void)
|
||||
{
|
||||
int ret = -ENODEV;
|
||||
int i;
|
||||
|
||||
if (RD_REG(&asym_2way, b_cr_asym_2way_mem_region_mchbar))
|
||||
return -ENODEV;
|
||||
|
||||
/*
|
||||
* RD_REGP() will fail for unpopulated or non-existent
|
||||
* DIMM slots. Return success if we find at least one DIMM.
|
||||
*/
|
||||
for (i = 0; i < APL_NUM_CHANNELS; i++)
|
||||
if (RD_REGP(&drp0[i], d_cr_drp0, apl_dports[i]))
|
||||
return -ENODEV;
|
||||
if (!RD_REGP(&drp0[i], d_cr_drp0, apl_dports[i]))
|
||||
ret = 0;
|
||||
|
||||
return 0;
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int dnv_get_registers(void)
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@ -2080,7 +2080,7 @@ static int thunderx_l2c_probe(struct pci_dev *pdev,
|
||||
if (IS_ENABLED(CONFIG_EDAC_DEBUG)) {
|
||||
l2c->debugfs = edac_debugfs_create_dir(pdev->dev.kobj.name);
|
||||
|
||||
thunderx_create_debugfs_nodes(l2c->debugfs, l2c_devattr,
|
||||
ret = thunderx_create_debugfs_nodes(l2c->debugfs, l2c_devattr,
|
||||
l2c, dfs_entries);
|
||||
|
||||
if (ret != dfs_entries) {
|
||||
|
||||
Loading…
Reference in New Issue
Block a user