mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-30 14:06:51 +07:00
drm/gm107/fb: initial implementation
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This commit is contained in:
parent
57f7422016
commit
267dcb6643
@ -101,6 +101,7 @@ nouveau-y += core/subdev/fb/nvaa.o
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nouveau-y += core/subdev/fb/nvaf.o
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nouveau-y += core/subdev/fb/nvc0.o
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nouveau-y += core/subdev/fb/nve0.o
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nouveau-y += core/subdev/fb/gm107.o
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nouveau-y += core/subdev/fb/ramnv04.o
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nouveau-y += core/subdev/fb/ramnv10.o
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nouveau-y += core/subdev/fb/ramnv1a.o
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@ -115,6 +116,7 @@ nouveau-y += core/subdev/fb/ramnva3.o
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nouveau-y += core/subdev/fb/ramnvaa.o
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nouveau-y += core/subdev/fb/ramnvc0.o
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nouveau-y += core/subdev/fb/ramnve0.o
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nouveau-y += core/subdev/fb/ramgm107.o
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nouveau-y += core/subdev/fb/sddr3.o
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nouveau-y += core/subdev/fb/gddr5.o
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nouveau-y += core/subdev/gpio/base.o
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@ -105,6 +105,7 @@ extern struct nouveau_oclass *nvaa_fb_oclass;
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extern struct nouveau_oclass *nvaf_fb_oclass;
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extern struct nouveau_oclass *nvc0_fb_oclass;
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extern struct nouveau_oclass *nve0_fb_oclass;
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extern struct nouveau_oclass *gm107_fb_oclass;
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#include <subdev/bios/ramcfg.h>
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38
drivers/gpu/drm/nouveau/core/subdev/fb/gm107.c
Normal file
38
drivers/gpu/drm/nouveau/core/subdev/fb/gm107.c
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@ -0,0 +1,38 @@
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/*
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* Copyright 2012 Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: Ben Skeggs
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*/
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#include "nvc0.h"
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struct nouveau_oclass *
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gm107_fb_oclass = &(struct nouveau_fb_impl) {
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.base.handle = NV_SUBDEV(FB, 0x07),
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.base.ofuncs = &(struct nouveau_ofuncs) {
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.ctor = nvc0_fb_ctor,
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.dtor = nvc0_fb_dtor,
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.init = nvc0_fb_init,
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.fini = _nouveau_fb_fini,
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},
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.memtype = nvc0_fb_memtype_valid,
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.ram = &gm107_ram_oclass,
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}.base;
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@ -18,12 +18,14 @@ int nvc0_fb_init(struct nouveau_object *);
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bool nvc0_fb_memtype_valid(struct nouveau_fb *, u32);
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#define nvc0_ram_create(p,e,o,d) \
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nvc0_ram_create_((p), (e), (o), sizeof(**d), (void **)d)
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#define nvc0_ram_create(p,e,o,m,d) \
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nvc0_ram_create_((p), (e), (o), (m), sizeof(**d), (void **)d)
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int nvc0_ram_create_(struct nouveau_object *, struct nouveau_object *,
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struct nouveau_oclass *, int, void **);
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struct nouveau_oclass *, u32, int, void **);
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int nvc0_ram_get(struct nouveau_fb *, u64, u32, u32, u32,
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struct nouveau_mem **);
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void nvc0_ram_put(struct nouveau_fb *, struct nouveau_mem **);
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int nve0_ram_init(struct nouveau_object*);
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#endif
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@ -32,6 +32,7 @@ extern struct nouveau_oclass nva3_ram_oclass;
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extern struct nouveau_oclass nvaa_ram_oclass;
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extern struct nouveau_oclass nvc0_ram_oclass;
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extern struct nouveau_oclass nve0_ram_oclass;
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extern struct nouveau_oclass gm107_ram_oclass;
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int nouveau_sddr3_calc(struct nouveau_ram *ram);
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int nouveau_gddr5_calc(struct nouveau_ram *ram, bool nuts);
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56
drivers/gpu/drm/nouveau/core/subdev/fb/ramgm107.c
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56
drivers/gpu/drm/nouveau/core/subdev/fb/ramgm107.c
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@ -0,0 +1,56 @@
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/*
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* Copyright 2013 Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: Ben Skeggs
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*/
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#include "nvc0.h"
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struct gm107_ram {
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struct nouveau_ram base;
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};
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static int
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gm107_ram_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
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struct nouveau_oclass *oclass, void *data, u32 size,
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struct nouveau_object **pobject)
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{
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struct gm107_ram *ram;
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int ret;
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ret = nvc0_ram_create(parent, engine, oclass, 0x021c14, &ram);
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*pobject = nv_object(ram);
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if (ret)
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return ret;
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return 0;
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}
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struct nouveau_oclass
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gm107_ram_oclass = {
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.handle = 0,
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.ofuncs = &(struct nouveau_ofuncs) {
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.ctor = gm107_ram_ctor,
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.dtor = _nouveau_ram_dtor,
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.init = nve0_ram_init,
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.fini = _nouveau_ram_fini,
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}
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};
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@ -505,7 +505,8 @@ nvc0_ram_get(struct nouveau_fb *pfb, u64 size, u32 align, u32 ncmin,
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int
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nvc0_ram_create_(struct nouveau_object *parent, struct nouveau_object *engine,
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struct nouveau_oclass *oclass, int size, void **pobject)
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struct nouveau_oclass *oclass, u32 maskaddr, int size,
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void **pobject)
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{
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struct nouveau_fb *pfb = nouveau_fb(parent);
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struct nouveau_bios *bios = nouveau_bios(pfb);
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@ -513,7 +514,7 @@ nvc0_ram_create_(struct nouveau_object *parent, struct nouveau_object *engine,
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const u32 rsvd_head = ( 256 * 1024) >> 12; /* vga memory */
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const u32 rsvd_tail = (1024 * 1024) >> 12; /* vbios etc */
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u32 parts = nv_rd32(pfb, 0x022438);
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u32 pmask = nv_rd32(pfb, 0x022554);
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u32 pmask = nv_rd32(pfb, maskaddr);
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u32 bsize = nv_rd32(pfb, 0x10f20c);
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u32 offset, length;
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bool uniform = true;
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@ -630,7 +631,7 @@ nvc0_ram_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
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struct nvc0_ram *ram;
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int ret;
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ret = nvc0_ram_create(parent, engine, oclass, &ram);
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ret = nvc0_ram_create(parent, engine, oclass, 0x022554, &ram);
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*pobject = nv_object(ram);
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if (ret)
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return ret;
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@ -1123,7 +1123,7 @@ nve0_ram_tidy(struct nouveau_fb *pfb)
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ram_exec(fuc, false);
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}
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static int
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int
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nve0_ram_init(struct nouveau_object *object)
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{
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struct nouveau_fb *pfb = (void *)object->parent;
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@ -1226,7 +1226,7 @@ nve0_ram_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
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int ret, i;
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u32 tmp;
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ret = nvc0_ram_create(parent, engine, oclass, &ram);
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ret = nvc0_ram_create(parent, engine, oclass, 0x022554, &ram);
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*pobject = nv_object(ram);
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if (ret)
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return ret;
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