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drm/i915/skl: Prefer even dividers for SKL DPLLs

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Currently, if an odd divider improves the deviation (minimizes it), we
take that divider. The recommendation is to prefer even dividers.

v2: Move the check at the right place after having inverted the two for
    loops in the previous patch.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This commit is contained in:
Damien Lespiau 2015-06-25 16:19:24 +01:00 committed by Daniel Vetter
parent dc25381392
commit 267db66345
1 changed files with 7 additions and 0 deletions
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7
drivers/gpu/drm/i915/intel_ddi.c
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@ -1317,6 +1317,13 @@ skl_ddi_calculate_wrpll(int clock /* in Hz */,
p);
}
}
/*
* If a solution is found with an even divider, prefer
* this one.
*/
if (d == 0 && ctx.p)
break;
}
if (!ctx.p) {