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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-25 20:40:53 +07:00
ixgbe: Allow link flow control in DCB mode for 82599 adapters
82599 supports using either link flow control or priority flow control when in DCB mode. The dcbnl interface already supports sending down configurations through rtnetlink that can enable LFC when DCB is enabled, so the driver should take advantage of this. 82598 does not support using LFC when DCB is enabled, so explicitly disable it when we're in DCB mode. This means we always run in PFC mode when DCB is enabled. Signed-off-by: Peter P Waskiewicz Jr <peter.p.waskiewicz.jr@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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70b77628d8
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@ -252,6 +252,7 @@ struct ixgbe_adapter {
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struct ixgbe_dcb_config dcb_cfg;
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struct ixgbe_dcb_config temp_dcb_cfg;
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u8 dcb_set_bitmap;
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enum ixgbe_fc_mode last_lfc_mode;
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/* Interrupt Throttle Rate */
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u32 itr_setting;
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@ -363,7 +363,7 @@ static s32 ixgbe_fc_enable_82598(struct ixgbe_hw *hw, s32 packetbuf_num)
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}
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/* Configure pause time (2 TCs per register) */
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reg = IXGBE_READ_REG(hw, IXGBE_FCTTV(packetbuf_num));
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reg = IXGBE_READ_REG(hw, IXGBE_FCTTV(packetbuf_num / 2));
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if ((packetbuf_num & 1) == 0)
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reg = (reg & 0xFFFF0000) | hw->fc.pause_time;
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else
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@ -1661,9 +1661,10 @@ s32 ixgbe_fc_enable(struct ixgbe_hw *hw, s32 packetbuf_num)
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reg = IXGBE_READ_REG(hw, IXGBE_MTQC);
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/* Thresholds are different for link flow control when in DCB mode */
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if (reg & IXGBE_MTQC_RT_ENA) {
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rx_pba_size = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(packetbuf_num));
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/* Always disable XON for LFC when in DCB mode */
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IXGBE_WRITE_REG(hw, IXGBE_FCRTL_82599(packetbuf_num), 0);
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rx_pba_size = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(packetbuf_num));
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reg = (rx_pba_size >> 2) & 0xFFE0;
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if (hw->fc.current_mode & ixgbe_fc_tx_pause)
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reg |= IXGBE_FCRTH_FCEN;
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@ -294,6 +294,9 @@ s32 ixgbe_dcb_config_pfc_82598(struct ixgbe_hw *hw,
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u32 reg, rx_pba_size;
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u8 i;
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if (!dcb_config->pfc_mode_enable)
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goto out;
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/* Enable Transmit Priority Flow Control */
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reg = IXGBE_READ_REG(hw, IXGBE_RMCS);
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reg &= ~IXGBE_RMCS_TFCE_802_3X;
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@ -341,6 +344,7 @@ s32 ixgbe_dcb_config_pfc_82598(struct ixgbe_hw *hw,
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/* Configure flow control refresh threshold value */
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IXGBE_WRITE_REG(hw, IXGBE_FCRTV, 0x3400);
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out:
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return 0;
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}
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@ -126,7 +126,10 @@ static u8 ixgbe_dcbnl_set_state(struct net_device *netdev, u8 state)
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netdev->netdev_ops->ndo_stop(netdev);
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ixgbe_clear_interrupt_scheme(adapter);
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adapter->hw.fc.requested_mode = ixgbe_fc_pfc;
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if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
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adapter->last_lfc_mode = adapter->hw.fc.current_mode;
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adapter->hw.fc.requested_mode = ixgbe_fc_none;
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}
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adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
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adapter->flags |= IXGBE_FLAG_DCB_ENABLED;
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ixgbe_init_interrupt_scheme(adapter);
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@ -135,11 +138,13 @@ static u8 ixgbe_dcbnl_set_state(struct net_device *netdev, u8 state)
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} else {
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/* Turn off DCB */
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if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
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adapter->hw.fc.requested_mode = ixgbe_fc_default;
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if (netif_running(netdev))
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netdev->netdev_ops->ndo_stop(netdev);
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ixgbe_clear_interrupt_scheme(adapter);
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adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
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adapter->temp_dcb_cfg.pfc_mode_enable = false;
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adapter->dcb_cfg.pfc_mode_enable = false;
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adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
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adapter->flags |= IXGBE_FLAG_RSS_ENABLED;
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ixgbe_init_interrupt_scheme(adapter);
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@ -329,9 +334,24 @@ static u8 ixgbe_dcbnl_set_all(struct net_device *netdev)
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return ret;
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}
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if (adapter->dcb_cfg.pfc_mode_enable) {
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if ((adapter->hw.mac.type != ixgbe_mac_82598EB) &&
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(adapter->hw.fc.current_mode != ixgbe_fc_pfc))
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adapter->last_lfc_mode = adapter->hw.fc.current_mode;
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adapter->hw.fc.requested_mode = ixgbe_fc_pfc;
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} else {
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if (adapter->hw.mac.type != ixgbe_mac_82598EB)
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adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
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else
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adapter->hw.fc.requested_mode = ixgbe_fc_none;
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}
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if (netif_running(netdev))
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ixgbe_up(adapter);
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if (adapter->dcb_cfg.pfc_mode_enable)
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adapter->hw.fc.current_mode = ixgbe_fc_pfc;
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adapter->dcb_set_bitmap = 0x00;
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clear_bit(__IXGBE_RESETTING, &adapter->state);
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return ret;
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@ -409,11 +429,17 @@ static u8 ixgbe_dcbnl_getpfcstate(struct net_device *netdev)
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{
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struct ixgbe_adapter *adapter = netdev_priv(netdev);
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return !!(adapter->flags & IXGBE_FLAG_DCB_ENABLED);
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return adapter->dcb_cfg.pfc_mode_enable;
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}
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static void ixgbe_dcbnl_setpfcstate(struct net_device *netdev, u8 state)
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{
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struct ixgbe_adapter *adapter = netdev_priv(netdev);
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adapter->temp_dcb_cfg.pfc_mode_enable = state;
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if (adapter->temp_dcb_cfg.pfc_mode_enable !=
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adapter->dcb_cfg.pfc_mode_enable)
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adapter->dcb_set_bitmap |= BIT_PFC;
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return;
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}
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@ -270,6 +270,13 @@ static int ixgbe_set_pauseparam(struct net_device *netdev,
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struct ixgbe_adapter *adapter = netdev_priv(netdev);
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struct ixgbe_hw *hw = &adapter->hw;
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#ifdef CONFIG_DCB
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if (adapter->dcb_cfg.pfc_mode_enable ||
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((hw->mac.type == ixgbe_mac_82598EB) &&
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(adapter->flags & IXGBE_FLAG_DCB_ENABLED)))
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return -EINVAL;
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#endif
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if (pause->autoneg != AUTONEG_ENABLE)
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hw->fc.disable_fc_autoneg = true;
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else
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@ -286,6 +293,9 @@ static int ixgbe_set_pauseparam(struct net_device *netdev,
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else
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return -EINVAL;
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#ifdef CONFIG_DCB
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adapter->last_lfc_mode = hw->fc.requested_mode;
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#endif
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hw->mac.ops.setup_fc(hw, 0);
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return 0;
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@ -3554,6 +3554,7 @@ static int __devinit ixgbe_sw_init(struct ixgbe_adapter *adapter)
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adapter->dcb_cfg.bw_percentage[DCB_TX_CONFIG][0] = 100;
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adapter->dcb_cfg.bw_percentage[DCB_RX_CONFIG][0] = 100;
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adapter->dcb_cfg.rx_pba_cfg = pba_equal;
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adapter->dcb_cfg.pfc_mode_enable = false;
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adapter->dcb_cfg.round_robin_enable = false;
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adapter->dcb_set_bitmap = 0x00;
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ixgbe_copy_dcb_cfg(&adapter->dcb_cfg, &adapter->temp_dcb_cfg,
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@ -3564,6 +3565,9 @@ static int __devinit ixgbe_sw_init(struct ixgbe_adapter *adapter)
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/* default flow control settings */
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hw->fc.requested_mode = ixgbe_fc_full;
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hw->fc.current_mode = ixgbe_fc_full; /* init for ethtool output */
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#ifdef CONFIG_DCB
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adapter->last_lfc_mode = hw->fc.current_mode;
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#endif
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hw->fc.high_water = IXGBE_DEFAULT_FCRTH;
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hw->fc.low_water = IXGBE_DEFAULT_FCRTL;
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hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
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@ -4319,11 +4323,24 @@ static void ixgbe_watchdog_task(struct work_struct *work)
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if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE) {
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hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
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if (link_up) {
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#ifdef CONFIG_DCB
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if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
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for (i = 0; i < MAX_TRAFFIC_CLASS; i++)
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hw->mac.ops.setup_fc(hw, i);
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} else {
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hw->mac.ops.setup_fc(hw, 0);
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}
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#else
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hw->mac.ops.setup_fc(hw, 0);
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#endif
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}
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if (link_up ||
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time_after(jiffies, (adapter->link_check_timeout +
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IXGBE_TRY_LINK_TIMEOUT))) {
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IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC);
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adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
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IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC);
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}
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adapter->link_up = link_up;
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adapter->link_speed = link_speed;
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