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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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x86_64: time.c white space wreckage cleanup
Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Chris Wright <chrisw@sous-sol.org> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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@ -220,7 +220,7 @@ unsigned long read_persistent_clock(void)
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/*
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* We know that x86-64 always uses BCD format, no need to check the
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* config register.
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*/
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*/
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BCD_TO_BIN(sec);
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BCD_TO_BIN(min);
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@ -233,11 +233,11 @@ unsigned long read_persistent_clock(void)
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BCD_TO_BIN(century);
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year += century * 100;
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printk(KERN_INFO "Extended CMOS year: %d\n", century * 100);
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} else {
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} else {
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/*
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* x86-64 systems only exists since 2002.
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* This will work up to Dec 31, 2100
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*/
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*/
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year += 2000;
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}
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@ -249,45 +249,45 @@ unsigned long read_persistent_clock(void)
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#define TICK_COUNT 100000000
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static unsigned int __init tsc_calibrate_cpu_khz(void)
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{
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int tsc_start, tsc_now;
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int i, no_ctr_free;
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unsigned long evntsel3 = 0, pmc3 = 0, pmc_now = 0;
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unsigned long flags;
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int tsc_start, tsc_now;
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int i, no_ctr_free;
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unsigned long evntsel3 = 0, pmc3 = 0, pmc_now = 0;
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unsigned long flags;
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for (i = 0; i < 4; i++)
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if (avail_to_resrv_perfctr_nmi_bit(i))
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break;
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no_ctr_free = (i == 4);
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if (no_ctr_free) {
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i = 3;
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rdmsrl(MSR_K7_EVNTSEL3, evntsel3);
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wrmsrl(MSR_K7_EVNTSEL3, 0);
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rdmsrl(MSR_K7_PERFCTR3, pmc3);
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} else {
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reserve_perfctr_nmi(MSR_K7_PERFCTR0 + i);
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reserve_evntsel_nmi(MSR_K7_EVNTSEL0 + i);
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}
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local_irq_save(flags);
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/* start meauring cycles, incrementing from 0 */
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wrmsrl(MSR_K7_PERFCTR0 + i, 0);
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wrmsrl(MSR_K7_EVNTSEL0 + i, 1 << 22 | 3 << 16 | 0x76);
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rdtscl(tsc_start);
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do {
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rdmsrl(MSR_K7_PERFCTR0 + i, pmc_now);
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tsc_now = get_cycles_sync();
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} while ((tsc_now - tsc_start) < TICK_COUNT);
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for (i = 0; i < 4; i++)
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if (avail_to_resrv_perfctr_nmi_bit(i))
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break;
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no_ctr_free = (i == 4);
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if (no_ctr_free) {
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i = 3;
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rdmsrl(MSR_K7_EVNTSEL3, evntsel3);
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wrmsrl(MSR_K7_EVNTSEL3, 0);
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rdmsrl(MSR_K7_PERFCTR3, pmc3);
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} else {
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reserve_perfctr_nmi(MSR_K7_PERFCTR0 + i);
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reserve_evntsel_nmi(MSR_K7_EVNTSEL0 + i);
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}
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local_irq_save(flags);
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/* start meauring cycles, incrementing from 0 */
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wrmsrl(MSR_K7_PERFCTR0 + i, 0);
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wrmsrl(MSR_K7_EVNTSEL0 + i, 1 << 22 | 3 << 16 | 0x76);
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rdtscl(tsc_start);
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do {
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rdmsrl(MSR_K7_PERFCTR0 + i, pmc_now);
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tsc_now = get_cycles_sync();
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} while ((tsc_now - tsc_start) < TICK_COUNT);
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local_irq_restore(flags);
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if (no_ctr_free) {
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wrmsrl(MSR_K7_EVNTSEL3, 0);
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wrmsrl(MSR_K7_PERFCTR3, pmc3);
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wrmsrl(MSR_K7_EVNTSEL3, evntsel3);
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} else {
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release_perfctr_nmi(MSR_K7_PERFCTR0 + i);
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release_evntsel_nmi(MSR_K7_EVNTSEL0 + i);
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}
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local_irq_restore(flags);
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if (no_ctr_free) {
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wrmsrl(MSR_K7_EVNTSEL3, 0);
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wrmsrl(MSR_K7_PERFCTR3, pmc3);
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wrmsrl(MSR_K7_EVNTSEL3, evntsel3);
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} else {
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release_perfctr_nmi(MSR_K7_PERFCTR0 + i);
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release_evntsel_nmi(MSR_K7_EVNTSEL0 + i);
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}
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return pmc_now * tsc_khz / (tsc_now - tsc_start);
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return pmc_now * tsc_khz / (tsc_now - tsc_start);
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}
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/*
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@ -315,7 +315,7 @@ static unsigned int __init pit_calibrate_tsc(void)
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end = get_cycles_sync();
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spin_unlock_irqrestore(&i8253_lock, flags);
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return (end - start) / 50;
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}
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@ -360,7 +360,7 @@ static struct irqaction irq0 = {
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.handler = timer_interrupt,
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.flags = IRQF_DISABLED | IRQF_IRQPOLL,
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.mask = CPU_MASK_NONE,
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.name = "timer"
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.name = "timer"
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};
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void __init time_init(void)
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@ -373,7 +373,7 @@ void __init time_init(void)
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if (hpet_use_timer) {
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/* set tick_nsec to use the proper rate for HPET */
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tick_nsec = TICK_NSEC_HPET;
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tick_nsec = TICK_NSEC_HPET;
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tsc_khz = hpet_calibrate_tsc();
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timename = "HPET";
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} else {
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