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ARM: dts: am335x-sl50: use phy-phandle declarations

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phy-phandle is now a preferred method to reference a PHY device. The new
method also allows you to specify a reset gpio which is required for
this board.

Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This commit is contained in:
Enric Balletbo i Serra 2018-06-06 17:54:07 +02:00 committed by Tony Lindgren
parent 7c1280267a
commit 25d2ee9f1b
1 changed files with 9 additions and 7 deletions
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16
arch/arm/boot/dts/am335x-sl50.dts
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@ -256,6 +256,8 @@ davinci_mdio_default: davinci_mdio_default {
/* MDIO */
AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
/* Ethernet */
AM33XX_IOPAD(0x838, PIN_INPUT_PULLUP | MUX_MODE7) /* Ethernet_nRST - gpmc_ad14.gpio1_14 */
>;
};
@ -327,7 +329,6 @@ AM33XX_IOPAD(0x9a4, PIN_OUTPUT | MUX_MODE7) /* SoundPA_en - mcasp0_fsr.gpio3_19
AM33XX_IOPAD(0x828, PIN_OUTPUT | MUX_MODE7) /* nKbdOnC - gpmc_ad10.gpio0_26 */
AM33XX_IOPAD(0x830, PIN_INPUT_PULLUP | MUX_MODE7) /* nKbdInt - gpmc_ad12.gpio1_12 */
AM33XX_IOPAD(0x834, PIN_INPUT_PULLUP | MUX_MODE7) /* nKbdReset - gpmc_ad13.gpio1_13 */
AM33XX_IOPAD(0x838, PIN_INPUT_PULLUP | MUX_MODE7) /* nDispReset - gpmc_ad14.gpio1_14 */
AM33XX_IOPAD(0x844, PIN_INPUT_PULLUP | MUX_MODE7) /* USB1_enPower - gpmc_a1.gpio1_17 */
/* PDI Bus - Battery system */
AM33XX_IOPAD(0x840, PIN_INPUT_PULLUP | MUX_MODE7) /* nBattReset gpmc_a0.gpio1_16 */
@ -556,13 +557,8 @@ ldo4_reg: regulator@6 {
};
&cpsw_emac0 {
phy_id = <&davinci_mdio>, <0>;
phy-mode = "mii";
};
&cpsw_emac1 {
phy_id = <&davinci_mdio>, <1>;
phy-mode = "mii";
phy-handle = <&ethphy0>;
};
&mac {
@ -577,6 +573,12 @@ &davinci_mdio {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&davinci_mdio_default>;
pinctrl-1 = <&davinci_mdio_sleep>;
reset-gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
reset-delay-us = <100>; /* PHY datasheet states 100us min */
ethphy0: ethernet-phy@0 {
reg = <0>;
};
};
&sham {