mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-23 15:04:25 +07:00
iwlwifi: remove unused parameter from grab_nic_access
All the callers used silent = false. Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
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a3f7ba5c88
commit
23ba93403b
@ -429,7 +429,7 @@ static void iwl_print_cont_event_trace(struct iwl_priv *priv, u32 base,
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ptr = base + (4 * sizeof(u32)) + (start_idx * 3 * sizeof(u32));
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/* Make sure device is powered up for SRAM reads */
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if (!iwl_trans_grab_nic_access(priv->trans, false, ®_flags))
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if (!iwl_trans_grab_nic_access(priv->trans, ®_flags))
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return;
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/* Set starting address; reads will auto-increment */
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@ -1731,7 +1731,7 @@ static int iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
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ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
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/* Make sure device is powered up for SRAM reads */
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if (!iwl_trans_grab_nic_access(trans, false, ®_flags))
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if (!iwl_trans_grab_nic_access(trans, ®_flags))
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return pos;
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/* Set starting address; reads will auto-increment */
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@ -184,7 +184,7 @@ static void iwl_tt_check_exit_ct_kill(unsigned long data)
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priv->thermal_throttle.ct_kill_toggle = true;
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}
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iwl_read32(priv->trans, CSR_UCODE_DRV_GP1);
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if (iwl_trans_grab_nic_access(priv->trans, false, &flags))
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if (iwl_trans_grab_nic_access(priv->trans, &flags))
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iwl_trans_release_nic_access(priv->trans, &flags);
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/* Reschedule the ct_kill timer to occur in
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@ -82,7 +82,7 @@ u32 iwl_read_direct32(struct iwl_trans *trans, u32 reg)
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{
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u32 value = 0x5a5a5a5a;
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unsigned long flags;
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if (iwl_trans_grab_nic_access(trans, false, &flags)) {
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if (iwl_trans_grab_nic_access(trans, &flags)) {
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value = iwl_read32(trans, reg);
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iwl_trans_release_nic_access(trans, &flags);
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}
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@ -95,7 +95,7 @@ void iwl_write_direct32(struct iwl_trans *trans, u32 reg, u32 value)
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{
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unsigned long flags;
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if (iwl_trans_grab_nic_access(trans, false, &flags)) {
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if (iwl_trans_grab_nic_access(trans, &flags)) {
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iwl_write32(trans, reg, value);
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iwl_trans_release_nic_access(trans, &flags);
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}
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@ -138,7 +138,7 @@ u32 iwl_read_prph(struct iwl_trans *trans, u32 ofs)
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unsigned long flags;
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u32 val = 0x5a5a5a5a;
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if (iwl_trans_grab_nic_access(trans, false, &flags)) {
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if (iwl_trans_grab_nic_access(trans, &flags)) {
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val = iwl_read_prph_no_grab(trans, ofs);
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iwl_trans_release_nic_access(trans, &flags);
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}
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@ -150,7 +150,7 @@ void iwl_write_prph(struct iwl_trans *trans, u32 ofs, u32 val)
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{
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unsigned long flags;
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if (iwl_trans_grab_nic_access(trans, false, &flags)) {
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if (iwl_trans_grab_nic_access(trans, &flags)) {
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iwl_write_prph_no_grab(trans, ofs, val);
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iwl_trans_release_nic_access(trans, &flags);
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}
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@ -176,7 +176,7 @@ void iwl_set_bits_prph(struct iwl_trans *trans, u32 ofs, u32 mask)
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{
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unsigned long flags;
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if (iwl_trans_grab_nic_access(trans, false, &flags)) {
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if (iwl_trans_grab_nic_access(trans, &flags)) {
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iwl_write_prph_no_grab(trans, ofs,
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iwl_read_prph_no_grab(trans, ofs) |
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mask);
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@ -190,7 +190,7 @@ void iwl_set_bits_mask_prph(struct iwl_trans *trans, u32 ofs,
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{
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unsigned long flags;
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if (iwl_trans_grab_nic_access(trans, false, &flags)) {
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if (iwl_trans_grab_nic_access(trans, &flags)) {
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iwl_write_prph_no_grab(trans, ofs,
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(iwl_read_prph_no_grab(trans, ofs) &
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mask) | bits);
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@ -204,7 +204,7 @@ void iwl_clear_bits_prph(struct iwl_trans *trans, u32 ofs, u32 mask)
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unsigned long flags;
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u32 val;
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if (iwl_trans_grab_nic_access(trans, false, &flags)) {
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if (iwl_trans_grab_nic_access(trans, &flags)) {
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val = iwl_read_prph_no_grab(trans, ofs);
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iwl_write_prph_no_grab(trans, ofs, (val & ~mask));
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iwl_trans_release_nic_access(trans, &flags);
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@ -652,8 +652,7 @@ struct iwl_trans_ops {
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void (*configure)(struct iwl_trans *trans,
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const struct iwl_trans_config *trans_cfg);
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void (*set_pmi)(struct iwl_trans *trans, bool state);
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bool (*grab_nic_access)(struct iwl_trans *trans, bool silent,
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unsigned long *flags);
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bool (*grab_nic_access)(struct iwl_trans *trans, unsigned long *flags);
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void (*release_nic_access)(struct iwl_trans *trans,
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unsigned long *flags);
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void (*set_bits_mask)(struct iwl_trans *trans, u32 reg, u32 mask,
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@ -1170,9 +1169,9 @@ iwl_trans_set_bits_mask(struct iwl_trans *trans, u32 reg, u32 mask, u32 value)
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trans->ops->set_bits_mask(trans, reg, mask, value);
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}
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#define iwl_trans_grab_nic_access(trans, silent, flags) \
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#define iwl_trans_grab_nic_access(trans, flags) \
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__cond_lock(nic_access, \
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likely((trans)->ops->grab_nic_access(trans, silent, flags)))
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likely((trans)->ops->grab_nic_access(trans, flags)))
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static inline void __releases(nic_access)
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iwl_trans_release_nic_access(struct iwl_trans *trans, unsigned long *flags)
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@ -122,7 +122,7 @@ static void iwl_mvm_dump_fifos(struct iwl_mvm *mvm,
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unsigned long flags;
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int i, j;
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if (!iwl_trans_grab_nic_access(mvm->trans, false, &flags))
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if (!iwl_trans_grab_nic_access(mvm->trans, &flags))
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return;
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/* Pull RXF data from all RXFs */
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@ -359,7 +359,7 @@ static u32 iwl_dump_prph(struct iwl_trans *trans,
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unsigned long flags;
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u32 prph_len = 0, i;
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if (!iwl_trans_grab_nic_access(trans, false, &flags))
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if (!iwl_trans_grab_nic_access(trans, &flags))
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return 0;
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for (i = 0; i < ARRAY_SIZE(iwl_prph_dump_addr); i++) {
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@ -1505,8 +1505,8 @@ static void iwl_trans_pcie_set_pmi(struct iwl_trans *trans, bool state)
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clear_bit(STATUS_TPOWER_PMI, &trans->status);
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}
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static bool iwl_trans_pcie_grab_nic_access(struct iwl_trans *trans, bool silent,
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unsigned long *flags)
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static bool iwl_trans_pcie_grab_nic_access(struct iwl_trans *trans,
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unsigned long *flags)
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{
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int ret;
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struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
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@ -1547,14 +1547,11 @@ static bool iwl_trans_pcie_grab_nic_access(struct iwl_trans *trans, bool silent,
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CSR_GP_CNTRL_REG_FLAG_GOING_TO_SLEEP), 15000);
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if (unlikely(ret < 0)) {
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iwl_write32(trans, CSR_RESET, CSR_RESET_REG_FLAG_FORCE_NMI);
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if (!silent) {
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u32 val = iwl_read32(trans, CSR_GP_CNTRL);
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WARN_ONCE(1,
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"Timeout waiting for hardware access (CSR_GP_CNTRL 0x%08x)\n",
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val);
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spin_unlock_irqrestore(&trans_pcie->reg_lock, *flags);
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return false;
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}
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WARN_ONCE(1,
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"Timeout waiting for hardware access (CSR_GP_CNTRL 0x%08x)\n",
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iwl_read32(trans, CSR_GP_CNTRL));
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spin_unlock_irqrestore(&trans_pcie->reg_lock, *flags);
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return false;
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}
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out:
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@ -1602,7 +1599,7 @@ static int iwl_trans_pcie_read_mem(struct iwl_trans *trans, u32 addr,
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int offs, ret = 0;
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u32 *vals = buf;
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if (iwl_trans_grab_nic_access(trans, false, &flags)) {
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if (iwl_trans_grab_nic_access(trans, &flags)) {
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iwl_write32(trans, HBUS_TARG_MEM_RADDR, addr);
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for (offs = 0; offs < dwords; offs++)
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vals[offs] = iwl_read32(trans, HBUS_TARG_MEM_RDAT);
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@ -1620,7 +1617,7 @@ static int iwl_trans_pcie_write_mem(struct iwl_trans *trans, u32 addr,
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int offs, ret = 0;
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const u32 *vals = buf;
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if (iwl_trans_grab_nic_access(trans, false, &flags)) {
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if (iwl_trans_grab_nic_access(trans, &flags)) {
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iwl_write32(trans, HBUS_TARG_MEM_WADDR, addr);
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for (offs = 0; offs < dwords; offs++)
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iwl_write32(trans, HBUS_TARG_MEM_WDAT,
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@ -2246,7 +2243,7 @@ static u32 iwl_trans_pcie_fh_regs_dump(struct iwl_trans *trans,
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__le32 *val;
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int i;
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if (!iwl_trans_grab_nic_access(trans, false, &flags))
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if (!iwl_trans_grab_nic_access(trans, &flags))
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return 0;
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(*data)->type = cpu_to_le32(IWL_FW_ERROR_DUMP_FH_REGS);
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@ -2273,7 +2270,7 @@ iwl_trans_pci_dump_marbh_monitor(struct iwl_trans *trans,
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unsigned long flags;
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u32 i;
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if (!iwl_trans_grab_nic_access(trans, false, &flags))
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if (!iwl_trans_grab_nic_access(trans, &flags))
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return 0;
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iwl_write_prph_no_grab(trans, MON_DMARB_RD_CTL_ADDR, 0x1);
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@ -2658,7 +2655,7 @@ struct iwl_trans *iwl_trans_pcie_alloc(struct pci_dev *pdev,
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goto out_pci_disable_msi;
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}
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if (iwl_trans_grab_nic_access(trans, false, &flags)) {
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if (iwl_trans_grab_nic_access(trans, &flags)) {
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u32 hw_step;
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hw_step = iwl_read_prph_no_grab(trans, WFPM_CTRL_REG);
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@ -770,7 +770,7 @@ static void iwl_pcie_tx_stop_fh(struct iwl_trans *trans)
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spin_lock(&trans_pcie->irq_lock);
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if (!iwl_trans_grab_nic_access(trans, false, &flags))
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if (!iwl_trans_grab_nic_access(trans, &flags))
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goto out;
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/* Stop each Tx DMA channel */
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