drivers/net: Remove boolean comparisons to true/false

Booleans should not be compared to true or false
but be directly tested or tested with !.

Done via cocci script:

@@
bool t;
@@
- t == true
+ t
@@
bool t;
@@
- t != true
+ !t
@@
bool t;
@@
- t == false
+ !t
@@
bool t;
@@
- t != false
+ t

Signed-off-by: Joe Perches <joe@perches.com>
Reviewed-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Joe Perches 2012-02-09 11:17:23 +00:00 committed by David S. Miller
parent 1a0d6ae579
commit 23677ce317
35 changed files with 84 additions and 100 deletions

View File

@ -614,8 +614,7 @@ static inline void bnx2x_igu_clear_sb_gen(struct bnx2x *bp, u8 func,
u32 igu_addr_ctl = IGU_REG_COMMAND_REG_CTRL; u32 igu_addr_ctl = IGU_REG_COMMAND_REG_CTRL;
u32 igu_addr_ack = IGU_REG_CSTORM_TYPE_0_SB_CLEANUP + (idu_sb_id/32)*4; u32 igu_addr_ack = IGU_REG_CSTORM_TYPE_0_SB_CLEANUP + (idu_sb_id/32)*4;
u32 sb_bit = 1 << (idu_sb_id%32); u32 sb_bit = 1 << (idu_sb_id%32);
u32 func_encode = func | u32 func_encode = func | (is_Pf ? 1 : 0) << IGU_FID_ENCODE_IS_PF_SHIFT;
((is_Pf == true ? 1 : 0) << IGU_FID_ENCODE_IS_PF_SHIFT);
u32 addr_encode = IGU_CMD_E2_PROD_UPD_BASE + idu_sb_id; u32 addr_encode = IGU_CMD_E2_PROD_UPD_BASE + idu_sb_id;
/* Not supported in BC mode */ /* Not supported in BC mode */

View File

@ -203,7 +203,7 @@ bfa_nw_cee_get_attr(struct bfa_cee *cee, struct bfa_cee_attr *attr,
if (!bfa_nw_ioc_is_operational(cee->ioc)) if (!bfa_nw_ioc_is_operational(cee->ioc))
return BFA_STATUS_IOC_FAILURE; return BFA_STATUS_IOC_FAILURE;
if (cee->get_attr_pending == true) if (cee->get_attr_pending)
return BFA_STATUS_DEVBUSY; return BFA_STATUS_DEVBUSY;
cee->get_attr_pending = true; cee->get_attr_pending = true;
@ -272,7 +272,7 @@ bfa_cee_notify(void *arg, enum bfa_ioc_event event)
switch (event) { switch (event) {
case BFA_IOC_E_DISABLED: case BFA_IOC_E_DISABLED:
case BFA_IOC_E_FAILED: case BFA_IOC_E_FAILED:
if (cee->get_attr_pending == true) { if (cee->get_attr_pending) {
cee->get_attr_status = BFA_STATUS_FAILED; cee->get_attr_status = BFA_STATUS_FAILED;
cee->get_attr_pending = false; cee->get_attr_pending = false;
if (cee->cbfn.get_attr_cbfn) { if (cee->cbfn.get_attr_cbfn) {
@ -281,7 +281,7 @@ bfa_cee_notify(void *arg, enum bfa_ioc_event event)
BFA_STATUS_FAILED); BFA_STATUS_FAILED);
} }
} }
if (cee->get_stats_pending == true) { if (cee->get_stats_pending) {
cee->get_stats_status = BFA_STATUS_FAILED; cee->get_stats_status = BFA_STATUS_FAILED;
cee->get_stats_pending = false; cee->get_stats_pending = false;
if (cee->cbfn.get_stats_cbfn) { if (cee->cbfn.get_stats_cbfn) {
@ -290,7 +290,7 @@ bfa_cee_notify(void *arg, enum bfa_ioc_event event)
BFA_STATUS_FAILED); BFA_STATUS_FAILED);
} }
} }
if (cee->reset_stats_pending == true) { if (cee->reset_stats_pending) {
cee->reset_stats_status = BFA_STATUS_FAILED; cee->reset_stats_status = BFA_STATUS_FAILED;
cee->reset_stats_pending = false; cee->reset_stats_pending = false;
if (cee->cbfn.reset_stats_cbfn) { if (cee->cbfn.reset_stats_cbfn) {

View File

@ -692,7 +692,7 @@ static void
bfa_iocpf_sm_mismatch_entry(struct bfa_iocpf *iocpf) bfa_iocpf_sm_mismatch_entry(struct bfa_iocpf *iocpf)
{ {
/* Call only the first time sm enters fwmismatch state. */ /* Call only the first time sm enters fwmismatch state. */
if (iocpf->fw_mismatch_notified == false) if (!iocpf->fw_mismatch_notified)
bfa_ioc_pf_fwmismatch(iocpf->ioc); bfa_ioc_pf_fwmismatch(iocpf->ioc);
iocpf->fw_mismatch_notified = true; iocpf->fw_mismatch_notified = true;

View File

@ -533,10 +533,8 @@ __le16
ixgb_get_eeprom_word(struct ixgb_hw *hw, u16 index) ixgb_get_eeprom_word(struct ixgb_hw *hw, u16 index)
{ {
if ((index < IXGB_EEPROM_SIZE) && if (index < IXGB_EEPROM_SIZE && ixgb_check_and_get_eeprom_data(hw))
(ixgb_check_and_get_eeprom_data(hw) == true)) {
return hw->eeprom[index]; return hw->eeprom[index];
}
return 0; return 0;
} }
@ -558,7 +556,7 @@ ixgb_get_ee_mac_addr(struct ixgb_hw *hw,
ENTER(); ENTER();
if (ixgb_check_and_get_eeprom_data(hw) == true) { if (ixgb_check_and_get_eeprom_data(hw)) {
for (i = 0; i < ETH_ALEN; i++) { for (i = 0; i < ETH_ALEN; i++) {
mac_addr[i] = ee_map->mac_addr[i]; mac_addr[i] = ee_map->mac_addr[i];
} }
@ -578,7 +576,7 @@ ixgb_get_ee_mac_addr(struct ixgb_hw *hw,
u32 u32
ixgb_get_ee_pba_number(struct ixgb_hw *hw) ixgb_get_ee_pba_number(struct ixgb_hw *hw)
{ {
if (ixgb_check_and_get_eeprom_data(hw) == true) if (ixgb_check_and_get_eeprom_data(hw))
return le16_to_cpu(hw->eeprom[EEPROM_PBA_1_2_REG]) return le16_to_cpu(hw->eeprom[EEPROM_PBA_1_2_REG])
| (le16_to_cpu(hw->eeprom[EEPROM_PBA_3_4_REG])<<16); | (le16_to_cpu(hw->eeprom[EEPROM_PBA_3_4_REG])<<16);
@ -599,7 +597,7 @@ ixgb_get_ee_device_id(struct ixgb_hw *hw)
{ {
struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom; struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom;
if (ixgb_check_and_get_eeprom_data(hw) == true) if (ixgb_check_and_get_eeprom_data(hw))
return le16_to_cpu(ee_map->device_id); return le16_to_cpu(ee_map->device_id);
return 0; return 0;

View File

@ -617,7 +617,7 @@ static s32 ixgbe_check_mac_link_82598(struct ixgbe_hw *hw,
*link_up = false; *link_up = false;
} }
if (*link_up == false) if (!*link_up)
goto out; goto out;
} }
@ -645,7 +645,7 @@ static s32 ixgbe_check_mac_link_82598(struct ixgbe_hw *hw,
else else
*speed = IXGBE_LINK_SPEED_1GB_FULL; *speed = IXGBE_LINK_SPEED_1GB_FULL;
if ((hw->device_id == IXGBE_DEV_ID_82598AT2) && (*link_up == true) && if ((hw->device_id == IXGBE_DEV_ID_82598AT2) && *link_up &&
(ixgbe_validate_link_ready(hw) != 0)) (ixgbe_validate_link_ready(hw) != 0))
*link_up = false; *link_up = false;

View File

@ -258,7 +258,7 @@ static void ixgbe_restore_vf_macvlans(struct ixgbe_adapter *adapter)
list_for_each(pos, &adapter->vf_mvs.l) { list_for_each(pos, &adapter->vf_mvs.l) {
entry = list_entry(pos, struct vf_macvlans, l); entry = list_entry(pos, struct vf_macvlans, l);
if (entry->free == false) if (!entry->free)
hw->mac.ops.set_rar(hw, entry->rar_entry, hw->mac.ops.set_rar(hw, entry->rar_entry,
entry->vf_macvlan, entry->vf_macvlan,
entry->vf, IXGBE_RAH_AV); entry->vf, IXGBE_RAH_AV);

View File

@ -760,7 +760,7 @@ static s32 ixgbe_blink_led_start_X540(struct ixgbe_hw *hw, u32 index)
* This will be reversed when we stop the blinking. * This will be reversed when we stop the blinking.
*/ */
hw->mac.ops.check_link(hw, &speed, &link_up, false); hw->mac.ops.check_link(hw, &speed, &link_up, false);
if (link_up == false) { if (!link_up) {
macc_reg = IXGBE_READ_REG(hw, IXGBE_MACC); macc_reg = IXGBE_READ_REG(hw, IXGBE_MACC);
macc_reg |= IXGBE_MACC_FLU | IXGBE_MACC_FSV_10G | IXGBE_MACC_FS; macc_reg |= IXGBE_MACC_FLU | IXGBE_MACC_FSV_10G | IXGBE_MACC_FS;
IXGBE_WRITE_REG(hw, IXGBE_MACC, macc_reg); IXGBE_WRITE_REG(hw, IXGBE_MACC, macc_reg);

View File

@ -1224,7 +1224,7 @@ static irqreturn_t pch_gbe_intr(int irq, void *data)
/* When request status is Receive interruption */ /* When request status is Receive interruption */
if ((int_st & (PCH_GBE_INT_RX_DMA_CMPLT | PCH_GBE_INT_TX_CMPLT)) || if ((int_st & (PCH_GBE_INT_RX_DMA_CMPLT | PCH_GBE_INT_TX_CMPLT)) ||
(adapter->rx_stop_flag == true)) { (adapter->rx_stop_flag)) {
if (likely(napi_schedule_prep(&adapter->napi))) { if (likely(napi_schedule_prep(&adapter->napi))) {
/* Enable only Rx Descriptor empty */ /* Enable only Rx Descriptor empty */
atomic_inc(&adapter->irq_sem); atomic_inc(&adapter->irq_sem);

View File

@ -355,8 +355,7 @@ static void bcm54xx_adjust_rxrefclk(struct phy_device *phydev)
} }
} }
if (clk125en == false || if (!clk125en || (phydev->dev_flags & PHY_BRCM_AUTO_PWRDWN_ENABLE))
(phydev->dev_flags & PHY_BRCM_AUTO_PWRDWN_ENABLE))
val &= ~BCM54XX_SHD_SCR3_DLLAPD_DIS; val &= ~BCM54XX_SHD_SCR3_DLLAPD_DIS;
else else
val |= BCM54XX_SHD_SCR3_DLLAPD_DIS; val |= BCM54XX_SHD_SCR3_DLLAPD_DIS;
@ -373,8 +372,7 @@ static void bcm54xx_adjust_rxrefclk(struct phy_device *phydev)
orig = val; orig = val;
if (clk125en == false || if (!clk125en || (phydev->dev_flags & PHY_BRCM_AUTO_PWRDWN_ENABLE))
(phydev->dev_flags & PHY_BRCM_AUTO_PWRDWN_ENABLE))
val |= BCM54XX_SHD_APD_EN; val |= BCM54XX_SHD_APD_EN;
else else
val &= ~BCM54XX_SHD_APD_EN; val &= ~BCM54XX_SHD_APD_EN;

View File

@ -257,7 +257,7 @@ ath5k_ani_raise_immunity(struct ath5k_hw *ah, struct ath5k_ani_state *as,
"beacon RSSI high"); "beacon RSSI high");
/* only OFDM: beacon RSSI is high, we can disable ODFM weak /* only OFDM: beacon RSSI is high, we can disable ODFM weak
* signal detection */ * signal detection */
if (ofdm_trigger && as->ofdm_weak_sig == true) { if (ofdm_trigger && as->ofdm_weak_sig) {
ath5k_ani_set_ofdm_weak_signal_detection(ah, false); ath5k_ani_set_ofdm_weak_signal_detection(ah, false);
ath5k_ani_set_spur_immunity_level(ah, 0); ath5k_ani_set_spur_immunity_level(ah, 0);
return; return;
@ -272,7 +272,7 @@ ath5k_ani_raise_immunity(struct ath5k_hw *ah, struct ath5k_ani_state *as,
* but can raise firstep level */ * but can raise firstep level */
ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI, ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI,
"beacon RSSI mid"); "beacon RSSI mid");
if (ofdm_trigger && as->ofdm_weak_sig == false) if (ofdm_trigger && !as->ofdm_weak_sig)
ath5k_ani_set_ofdm_weak_signal_detection(ah, true); ath5k_ani_set_ofdm_weak_signal_detection(ah, true);
if (as->firstep_level < ATH5K_ANI_MAX_FIRSTEP_LVL) if (as->firstep_level < ATH5K_ANI_MAX_FIRSTEP_LVL)
ath5k_ani_set_firstep_level(ah, as->firstep_level + 1); ath5k_ani_set_firstep_level(ah, as->firstep_level + 1);
@ -282,7 +282,7 @@ ath5k_ani_raise_immunity(struct ath5k_hw *ah, struct ath5k_ani_state *as,
* detect and zero firstep level to maximize CCK sensitivity */ * detect and zero firstep level to maximize CCK sensitivity */
ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI, ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI,
"beacon RSSI low, 2GHz"); "beacon RSSI low, 2GHz");
if (ofdm_trigger && as->ofdm_weak_sig == true) if (ofdm_trigger && as->ofdm_weak_sig)
ath5k_ani_set_ofdm_weak_signal_detection(ah, false); ath5k_ani_set_ofdm_weak_signal_detection(ah, false);
if (as->firstep_level > 0) if (as->firstep_level > 0)
ath5k_ani_set_firstep_level(ah, 0); ath5k_ani_set_firstep_level(ah, 0);
@ -326,7 +326,7 @@ ath5k_ani_lower_immunity(struct ath5k_hw *ah, struct ath5k_ani_state *as)
} else if (rssi > ATH5K_ANI_RSSI_THR_LOW) { } else if (rssi > ATH5K_ANI_RSSI_THR_LOW) {
/* beacon RSSI is mid-range: turn on ODFM weak signal /* beacon RSSI is mid-range: turn on ODFM weak signal
* detection and next, lower firstep level */ * detection and next, lower firstep level */
if (as->ofdm_weak_sig == false) { if (!as->ofdm_weak_sig) {
ath5k_ani_set_ofdm_weak_signal_detection(ah, ath5k_ani_set_ofdm_weak_signal_detection(ah,
true); true);
return; return;

View File

@ -407,20 +407,20 @@ static void ath9k_hw_ani_lower_immunity_old(struct ath_hw *ah)
if (aniState->ofdmWeakSigDetectOff) { if (aniState->ofdmWeakSigDetectOff) {
if (ath9k_hw_ani_control(ah, if (ath9k_hw_ani_control(ah,
ATH9K_ANI_OFDM_WEAK_SIGNAL_DETECTION, ATH9K_ANI_OFDM_WEAK_SIGNAL_DETECTION,
true) == true) true))
return; return;
} }
if (aniState->firstepLevel > 0) { if (aniState->firstepLevel > 0) {
if (ath9k_hw_ani_control(ah, if (ath9k_hw_ani_control(ah,
ATH9K_ANI_FIRSTEP_LEVEL, ATH9K_ANI_FIRSTEP_LEVEL,
aniState->firstepLevel - 1) == true) aniState->firstepLevel - 1))
return; return;
} }
} else { } else {
if (aniState->firstepLevel > 0) { if (aniState->firstepLevel > 0) {
if (ath9k_hw_ani_control(ah, if (ath9k_hw_ani_control(ah,
ATH9K_ANI_FIRSTEP_LEVEL, ATH9K_ANI_FIRSTEP_LEVEL,
aniState->firstepLevel - 1) == true) aniState->firstepLevel - 1))
return; return;
} }
} }

View File

@ -24,7 +24,7 @@
static inline void ath9k_hw_configpcipowersave(struct ath_hw *ah, static inline void ath9k_hw_configpcipowersave(struct ath_hw *ah,
bool power_off) bool power_off)
{ {
if (ah->aspm_enabled != true) if (!ah->aspm_enabled)
return; return;
ath9k_hw_ops(ah)->config_pci_powersave(ah, power_off); ath9k_hw_ops(ah)->config_pci_powersave(ah, power_off);

View File

@ -1600,7 +1600,7 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan,
allow_fbs = true; allow_fbs = true;
if (bChannelChange && if (bChannelChange &&
(ah->chip_fullsleep != true) && (!ah->chip_fullsleep) &&
(ah->curchan != NULL) && (ah->curchan != NULL) &&
(chan->channel != ah->curchan->channel) && (chan->channel != ah->curchan->channel) &&
(allow_fbs || (allow_fbs ||
@ -2038,8 +2038,7 @@ static bool ath9k_hw_set_power_awake(struct ath_hw *ah, int setChip)
if (setChip) { if (setChip) {
if ((REG_READ(ah, AR_RTC_STATUS) & if ((REG_READ(ah, AR_RTC_STATUS) &
AR_RTC_STATUS_M) == AR_RTC_STATUS_SHUTDOWN) { AR_RTC_STATUS_M) == AR_RTC_STATUS_SHUTDOWN) {
if (ath9k_hw_set_reset_reg(ah, if (!ath9k_hw_set_reset_reg(ah, ATH9K_RESET_POWER_ON)) {
ATH9K_RESET_POWER_ON) != true) {
return false; return false;
} }
if (!AR_SREV_9300_20_OR_LATER(ah)) if (!AR_SREV_9300_20_OR_LATER(ah))

View File

@ -767,7 +767,7 @@ static int brcmf_sdbrcm_htclk(struct brcmf_sdio *bus, bool on, bool pendok)
brcmf_dbg(INFO, "CLKCTL: turned ON\n"); brcmf_dbg(INFO, "CLKCTL: turned ON\n");
#if defined(DEBUG) #if defined(DEBUG)
if (bus->alp_only != true) { if (!bus->alp_only) {
if (SBSDIO_ALPONLY(clkctl)) if (SBSDIO_ALPONLY(clkctl))
brcmf_dbg(ERROR, "HT Clock should be on\n"); brcmf_dbg(ERROR, "HT Clock should be on\n");
} }
@ -2059,8 +2059,7 @@ static void
brcmf_sdbrcm_wait_for_event(struct brcmf_sdio *bus, bool *lockvar) brcmf_sdbrcm_wait_for_event(struct brcmf_sdio *bus, bool *lockvar)
{ {
up(&bus->sdsem); up(&bus->sdsem);
wait_event_interruptible_timeout(bus->ctrl_wait, wait_event_interruptible_timeout(bus->ctrl_wait, !*lockvar, HZ * 2);
(*lockvar == false), HZ * 2);
down(&bus->sdsem); down(&bus->sdsem);
return; return;
} }
@ -2647,8 +2646,7 @@ static int brcmf_sdbrcm_bus_txdata(struct device *dev, struct sk_buff *pkt)
/* Priority based enq */ /* Priority based enq */
spin_lock_bh(&bus->txqlock); spin_lock_bh(&bus->txqlock);
if (brcmf_c_prec_enq(bus->sdiodev->dev, &bus->txq, pkt, prec) == if (!brcmf_c_prec_enq(bus->sdiodev->dev, &bus->txq, pkt, prec)) {
false) {
skb_pull(pkt, SDPCM_HDRLEN); skb_pull(pkt, SDPCM_HDRLEN);
brcmf_txcomplete(bus->sdiodev->dev, pkt, false); brcmf_txcomplete(bus->sdiodev->dev, pkt, false);
brcmu_pkt_buf_free_skb(pkt); brcmu_pkt_buf_free_skb(pkt);
@ -2935,7 +2933,7 @@ brcmf_sdbrcm_bus_txctl(struct device *dev, unsigned char *msg, uint msglen)
brcmf_sdbrcm_wait_for_event(bus, &bus->ctrl_frame_stat); brcmf_sdbrcm_wait_for_event(bus, &bus->ctrl_frame_stat);
if (bus->ctrl_frame_stat == false) { if (!bus->ctrl_frame_stat) {
brcmf_dbg(INFO, "ctrl_frame_stat == false\n"); brcmf_dbg(INFO, "ctrl_frame_stat == false\n");
ret = 0; ret = 0;
} else { } else {
@ -2997,7 +2995,7 @@ brcmf_sdbrcm_bus_rxctl(struct device *dev, unsigned char *msg, uint msglen)
rxlen, msglen); rxlen, msglen);
} else if (timeleft == 0) { } else if (timeleft == 0) {
brcmf_dbg(ERROR, "resumed on timeout\n"); brcmf_dbg(ERROR, "resumed on timeout\n");
} else if (pending == true) { } else if (pending) {
brcmf_dbg(CTL, "cancelled\n"); brcmf_dbg(CTL, "cancelled\n");
return -ERESTARTSYS; return -ERESTARTSYS;
} else { } else {
@ -3983,7 +3981,7 @@ void
brcmf_sdbrcm_wd_timer(struct brcmf_sdio *bus, uint wdtick) brcmf_sdbrcm_wd_timer(struct brcmf_sdio *bus, uint wdtick)
{ {
/* Totally stop the timer */ /* Totally stop the timer */
if (!wdtick && bus->wd_timer_valid == true) { if (!wdtick && bus->wd_timer_valid) {
del_timer_sync(&bus->timer); del_timer_sync(&bus->timer);
bus->wd_timer_valid = false; bus->wd_timer_valid = false;
bus->save_ms = wdtick; bus->save_ms = wdtick;
@ -3996,7 +3994,7 @@ brcmf_sdbrcm_wd_timer(struct brcmf_sdio *bus, uint wdtick)
if (wdtick) { if (wdtick) {
if (bus->save_ms != BRCMF_WD_POLL_MS) { if (bus->save_ms != BRCMF_WD_POLL_MS) {
if (bus->wd_timer_valid == true) if (bus->wd_timer_valid)
/* Stop timer and restart at new value */ /* Stop timer and restart at new value */
del_timer_sync(&bus->timer); del_timer_sync(&bus->timer);

View File

@ -3248,7 +3248,7 @@ static void brcms_b_coreinit(struct brcms_c_info *wlc)
} }
/* For old ucode, txfifo sizes needs to be modified(increased) */ /* For old ucode, txfifo sizes needs to be modified(increased) */
if (fifosz_fixup == true) if (fifosz_fixup)
brcms_b_corerev_fifofixup(wlc_hw); brcms_b_corerev_fifofixup(wlc_hw);
/* check txfifo allocations match between ucode and driver */ /* check txfifo allocations match between ucode and driver */
@ -5427,7 +5427,7 @@ int brcms_c_set_gmode(struct brcms_c_info *wlc, u8 gmode, bool config)
return -EINVAL; return -EINVAL;
/* update configuration value */ /* update configuration value */
if (config == true) if (config)
brcms_c_protection_upd(wlc, BRCMS_PROT_G_USER, gmode); brcms_c_protection_upd(wlc, BRCMS_PROT_G_USER, gmode);
/* Clear rateset override */ /* Clear rateset override */

View File

@ -21464,7 +21464,7 @@ void wlc_phy_antsel_init(struct brcms_phy_pub *ppi, bool lut_init)
if (NREV_GE(pi->pubpi.phy_rev, 3)) { if (NREV_GE(pi->pubpi.phy_rev, 3)) {
u16 v0 = 0x211, v1 = 0x222, v2 = 0x144, v3 = 0x188; u16 v0 = 0x211, v1 = 0x222, v2 = 0x144, v3 = 0x188;
if (lut_init == false) if (!lut_init)
return; return;
if (pi->srom_fem2g.antswctrllut == 0) { if (pi->srom_fem2g.antswctrllut == 0) {

View File

@ -478,7 +478,7 @@ void iwl_trans_pcie_tx_agg_setup(struct iwl_trans *trans,
} }
txq_id = trans_pcie->agg_txq[sta_id][tid]; txq_id = trans_pcie->agg_txq[sta_id][tid];
if (WARN_ON_ONCE(is_agg_txqid_valid(trans, txq_id) == false)) { if (WARN_ON_ONCE(!is_agg_txqid_valid(trans, txq_id))) {
IWL_ERR(trans, IWL_ERR(trans,
"queue number out of range: %d, must be %d to %d\n", "queue number out of range: %d, must be %d to %d\n",
txq_id, IWLAGN_FIRST_AMPDU_QUEUE, txq_id, IWLAGN_FIRST_AMPDU_QUEUE,
@ -573,7 +573,7 @@ int iwl_trans_pcie_tx_agg_disable(struct iwl_trans *trans, int sta_id, int tid)
struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
u8 txq_id = trans_pcie->agg_txq[sta_id][tid]; u8 txq_id = trans_pcie->agg_txq[sta_id][tid];
if (WARN_ON_ONCE(is_agg_txqid_valid(trans, txq_id) == false)) { if (WARN_ON_ONCE(!is_agg_txqid_valid(trans, txq_id))) {
IWL_ERR(trans, IWL_ERR(trans,
"queue number out of range: %d, must be %d to %d\n", "queue number out of range: %d, must be %d to %d\n",
txq_id, IWLAGN_FIRST_AMPDU_QUEUE, txq_id, IWLAGN_FIRST_AMPDU_QUEUE,

View File

@ -1330,7 +1330,7 @@ static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
wh->addr1); wh->addr1);
if (mwl8k_vif != NULL && if (mwl8k_vif != NULL &&
mwl8k_vif->is_hw_crypto_enabled == true) { mwl8k_vif->is_hw_crypto_enabled) {
/* /*
* When MMIC ERROR is encountered * When MMIC ERROR is encountered
* by the firmware, payload is * by the firmware, payload is
@ -1993,8 +1993,7 @@ mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb)
*/ */
if (txq->len >= MWL8K_TX_DESCS - 2) { if (txq->len >= MWL8K_TX_DESCS - 2) {
if (mgmtframe == false || if (!mgmtframe || txq->len == MWL8K_TX_DESCS) {
txq->len == MWL8K_TX_DESCS) {
if (start_ba_session) { if (start_ba_session) {
spin_lock(&priv->stream_lock); spin_lock(&priv->stream_lock);
mwl8k_remove_stream(hw, stream); mwl8k_remove_stream(hw, stream);

View File

@ -777,7 +777,7 @@ static void efuse_write_data_case1(struct ieee80211_hw *hw, u16 *efuse_addr,
dataempty = false; dataempty = false;
} }
if (dataempty == false) { if (!dataempty) {
*efuse_addr = *efuse_addr + (tmp_word_cnts * 2) + 1; *efuse_addr = *efuse_addr + (tmp_word_cnts * 2) + 1;
*write_state = PG_STATE_HEADER; *write_state = PG_STATE_HEADER;
} else { } else {

View File

@ -105,8 +105,7 @@ bool rtl_ps_set_rf_state(struct ieee80211_hw *hw,
case ERFOFF: case ERFOFF:
if ((changesource == RF_CHANGE_BY_HW) if ((changesource == RF_CHANGE_BY_HW) && !ppsc->hwradiooff) {
&& (ppsc->hwradiooff == false)) {
ppsc->hwradiooff = true; ppsc->hwradiooff = true;
} }

View File

@ -329,8 +329,8 @@ static void rtl92c_dm_initial_gain_multi_sta(struct ieee80211_hw *hw)
if (mac->opmode == NL80211_IFTYPE_ADHOC) if (mac->opmode == NL80211_IFTYPE_ADHOC)
multi_sta = true; multi_sta = true;
if ((multi_sta == false) || (dm_digtable.cursta_connectctate != if (!multi_sta ||
DIG_STA_DISCONNECT)) { dm_digtable.cursta_connectctate != DIG_STA_DISCONNECT) {
initialized = false; initialized = false;
dm_digtable.dig_ext_port_stage = DIG_EXT_PORT_STAGE_MAX; dm_digtable.dig_ext_port_stage = DIG_EXT_PORT_STAGE_MAX;
return; return;

View File

@ -216,7 +216,7 @@ bool _rtl92c_phy_bb8192c_config_parafile(struct ieee80211_hw *hw)
RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, "==>\n"); RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, "==>\n");
rtstatus = rtlpriv->cfg->ops->config_bb_with_headerfile(hw, rtstatus = rtlpriv->cfg->ops->config_bb_with_headerfile(hw,
BASEBAND_CONFIG_PHY_REG); BASEBAND_CONFIG_PHY_REG);
if (rtstatus != true) { if (!rtstatus) {
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Write BB Reg Fail!!\n"); RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Write BB Reg Fail!!\n");
return false; return false;
} }
@ -229,13 +229,13 @@ bool _rtl92c_phy_bb8192c_config_parafile(struct ieee80211_hw *hw)
rtstatus = rtlpriv->cfg->ops->config_bb_with_pgheaderfile(hw, rtstatus = rtlpriv->cfg->ops->config_bb_with_pgheaderfile(hw,
BASEBAND_CONFIG_PHY_REG); BASEBAND_CONFIG_PHY_REG);
} }
if (rtstatus != true) { if (!rtstatus) {
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "BB_PG Reg Fail!!\n"); RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "BB_PG Reg Fail!!\n");
return false; return false;
} }
rtstatus = rtlpriv->cfg->ops->config_bb_with_headerfile(hw, rtstatus = rtlpriv->cfg->ops->config_bb_with_headerfile(hw,
BASEBAND_CONFIG_AGC_TAB); BASEBAND_CONFIG_AGC_TAB);
if (rtstatus != true) { if (!rtstatus) {
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "AGC Table Fail\n"); RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "AGC Table Fail\n");
return false; return false;
} }
@ -580,7 +580,7 @@ void rtl92c_phy_set_txpower_level(struct ieee80211_hw *hw, u8 channel)
struct rtl_efuse *rtlefuse = rtl_efuse(rtlpriv); struct rtl_efuse *rtlefuse = rtl_efuse(rtlpriv);
u8 cckpowerlevel[2], ofdmpowerlevel[2]; u8 cckpowerlevel[2], ofdmpowerlevel[2];
if (rtlefuse->txpwr_fromeprom == false) if (!rtlefuse->txpwr_fromeprom)
return; return;
_rtl92c_get_txpower_index(hw, channel, _rtl92c_get_txpower_index(hw, channel,
&cckpowerlevel[0], &ofdmpowerlevel[0]); &cckpowerlevel[0], &ofdmpowerlevel[0]);

View File

@ -693,7 +693,7 @@ static bool _rtl92ce_init_mac(struct ieee80211_hw *hw)
rtl_write_word(rtlpriv, REG_CR, 0x2ff); rtl_write_word(rtlpriv, REG_CR, 0x2ff);
if (_rtl92ce_llt_table_init(hw) == false) if (!_rtl92ce_llt_table_init(hw))
return false; return false;
rtl_write_dword(rtlpriv, REG_HISR, 0xffffffff); rtl_write_dword(rtlpriv, REG_HISR, 0xffffffff);
@ -906,7 +906,7 @@ int rtl92ce_hw_init(struct ieee80211_hw *hw)
rtlpci->being_init_adapter = true; rtlpci->being_init_adapter = true;
rtlpriv->intf_ops->disable_aspm(hw); rtlpriv->intf_ops->disable_aspm(hw);
rtstatus = _rtl92ce_init_mac(hw); rtstatus = _rtl92ce_init_mac(hw);
if (rtstatus != true) { if (!rtstatus) {
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Init MAC failed\n"); RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Init MAC failed\n");
err = 1; err = 1;
return err; return err;
@ -1117,7 +1117,7 @@ void rtl92ce_set_check_bssid(struct ieee80211_hw *hw, bool check_bssid)
rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_RCR, rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_RCR,
(u8 *) (&reg_rcr)); (u8 *) (&reg_rcr));
_rtl92ce_set_bcn_ctrl_reg(hw, 0, BIT(4)); _rtl92ce_set_bcn_ctrl_reg(hw, 0, BIT(4));
} else if (check_bssid == false) { } else if (!check_bssid) {
reg_rcr &= (~(RCR_CBSSID_DATA | RCR_CBSSID_BCN)); reg_rcr &= (~(RCR_CBSSID_DATA | RCR_CBSSID_BCN));
_rtl92ce_set_bcn_ctrl_reg(hw, BIT(4), 0); _rtl92ce_set_bcn_ctrl_reg(hw, BIT(4), 0);
rtlpriv->cfg->ops->set_hw_reg(hw, rtlpriv->cfg->ops->set_hw_reg(hw,
@ -1985,8 +1985,7 @@ bool rtl92ce_gpio_radio_on_off_checking(struct ieee80211_hw *hw, u8 *valid)
e_rfpowerstate_toset = ERFON; e_rfpowerstate_toset = ERFON;
ppsc->hwradiooff = false; ppsc->hwradiooff = false;
actuallyset = true; actuallyset = true;
} else if ((ppsc->hwradiooff == false) } else if (!ppsc->hwradiooff && (e_rfpowerstate_toset == ERFOFF)) {
&& (e_rfpowerstate_toset == ERFOFF)) {
RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG, RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG,
"GPIOChangeRF - HW Radio OFF, RF OFF\n"); "GPIOChangeRF - HW Radio OFF, RF OFF\n");

View File

@ -522,8 +522,7 @@ static bool _rtl92ce_phy_set_rf_power_state(struct ieee80211_hw *hw,
RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG, RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG,
"IPS Set eRf nic enable\n"); "IPS Set eRf nic enable\n");
rtstatus = rtl_ps_enable_nic(hw); rtstatus = rtl_ps_enable_nic(hw);
} while ((rtstatus != true) } while (!rtstatus && (InitializeCount < 10));
&& (InitializeCount < 10));
RT_CLEAR_PS_LEVEL(ppsc, RT_CLEAR_PS_LEVEL(ppsc,
RT_RF_OFF_LEVL_HALT_NIC); RT_RF_OFF_LEVL_HALT_NIC);
} else { } else {

View File

@ -503,7 +503,7 @@ static bool _rtl92ce_phy_rf6052_config_parafile(struct ieee80211_hw *hw)
break; break;
} }
if (rtstatus != true) { if (!rtstatus) {
RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
"Radio[%d] Fail!!\n", rfpath); "Radio[%d] Fail!!\n", rfpath);
return false; return false;

View File

@ -477,8 +477,7 @@ static bool _rtl92cu_phy_set_rf_power_state(struct ieee80211_hw *hw,
RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG, RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG,
"IPS Set eRf nic enable\n"); "IPS Set eRf nic enable\n");
rtstatus = rtl_ps_enable_nic(hw); rtstatus = rtl_ps_enable_nic(hw);
} while ((rtstatus != true) } while (!rtstatus && (InitializeCount < 10));
&& (InitializeCount < 10));
RT_CLEAR_PS_LEVEL(ppsc, RT_CLEAR_PS_LEVEL(ppsc,
RT_RF_OFF_LEVL_HALT_NIC); RT_RF_OFF_LEVL_HALT_NIC);
} else { } else {

View File

@ -479,7 +479,7 @@ static bool _rtl92c_phy_rf6052_config_parafile(struct ieee80211_hw *hw)
BRFSI_RFENV << 16, u4_regvalue); BRFSI_RFENV << 16, u4_regvalue);
break; break;
} }
if (rtstatus != true) { if (!rtstatus) {
RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
"Radio[%d] Fail!!", rfpath); "Radio[%d] Fail!!", rfpath);
goto phy_rf_cfg_fail; goto phy_rf_cfg_fail;

View File

@ -405,7 +405,7 @@ static void rtl92d_dm_dig(struct ieee80211_hw *hw)
de_digtable.last_min_undecorated_pwdb_for_dm = de_digtable.last_min_undecorated_pwdb_for_dm =
de_digtable.min_undecorated_pwdb_for_dm; de_digtable.min_undecorated_pwdb_for_dm;
} }
if (rtlpriv->dm.dm_initialgain_enable == false) if (!rtlpriv->dm.dm_initialgain_enable)
return; return;
/* because we will send data pkt when scanning /* because we will send data pkt when scanning

View File

@ -707,7 +707,7 @@ static bool _rtl92de_init_mac(struct ieee80211_hw *hw)
/* System init */ /* System init */
/* 18. LLT_table_init(Adapter); */ /* 18. LLT_table_init(Adapter); */
if (_rtl92de_llt_table_init(hw) == false) if (!_rtl92de_llt_table_init(hw))
return false; return false;
/* Clear interrupt and enable interrupt */ /* Clear interrupt and enable interrupt */
@ -920,7 +920,7 @@ int rtl92de_hw_init(struct ieee80211_hw *hw)
rtl92d_phy_reset_iqk_result(hw); rtl92d_phy_reset_iqk_result(hw);
/* rtlpriv->intf_ops->disable_aspm(hw); */ /* rtlpriv->intf_ops->disable_aspm(hw); */
rtstatus = _rtl92de_init_mac(hw); rtstatus = _rtl92de_init_mac(hw);
if (rtstatus != true) { if (!rtstatus) {
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Init MAC failed\n"); RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Init MAC failed\n");
err = 1; err = 1;
spin_unlock_irqrestore(&globalmutex_for_power_and_efuse, flags); spin_unlock_irqrestore(&globalmutex_for_power_and_efuse, flags);
@ -1147,7 +1147,7 @@ void rtl92de_set_check_bssid(struct ieee80211_hw *hw, bool check_bssid)
reg_rcr |= (RCR_CBSSID_DATA | RCR_CBSSID_BCN); reg_rcr |= (RCR_CBSSID_DATA | RCR_CBSSID_BCN);
rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_RCR, (u8 *)(&reg_rcr)); rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_RCR, (u8 *)(&reg_rcr));
_rtl92de_set_bcn_ctrl_reg(hw, 0, BIT(4)); _rtl92de_set_bcn_ctrl_reg(hw, 0, BIT(4));
} else if (check_bssid == false) { } else if (!check_bssid) {
reg_rcr &= (~(RCR_CBSSID_DATA | RCR_CBSSID_BCN)); reg_rcr &= (~(RCR_CBSSID_DATA | RCR_CBSSID_BCN));
_rtl92de_set_bcn_ctrl_reg(hw, BIT(4), 0); _rtl92de_set_bcn_ctrl_reg(hw, BIT(4), 0);
rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_RCR, (u8 *)(&reg_rcr)); rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_RCR, (u8 *)(&reg_rcr));
@ -2151,8 +2151,7 @@ bool rtl92de_gpio_radio_on_off_checking(struct ieee80211_hw *hw, u8 *valid)
e_rfpowerstate_toset = ERFON; e_rfpowerstate_toset = ERFON;
ppsc->hwradiooff = false; ppsc->hwradiooff = false;
actuallyset = true; actuallyset = true;
} else if ((ppsc->hwradiooff == false) } else if (!ppsc->hwradiooff && (e_rfpowerstate_toset == ERFOFF)) {
&& (e_rfpowerstate_toset == ERFOFF)) {
RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG, RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG,
"GPIOChangeRF - HW Radio OFF, RF OFF\n"); "GPIOChangeRF - HW Radio OFF, RF OFF\n");
e_rfpowerstate_toset = ERFOFF; e_rfpowerstate_toset = ERFOFF;

View File

@ -859,7 +859,7 @@ static bool _rtl92d_phy_bb_config(struct ieee80211_hw *hw)
RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, "==>\n"); RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, "==>\n");
rtstatus = _rtl92d_phy_config_bb_with_headerfile(hw, rtstatus = _rtl92d_phy_config_bb_with_headerfile(hw,
BASEBAND_CONFIG_PHY_REG); BASEBAND_CONFIG_PHY_REG);
if (rtstatus != true) { if (!rtstatus) {
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Write BB Reg Fail!!\n"); RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Write BB Reg Fail!!\n");
return false; return false;
} }
@ -874,13 +874,13 @@ static bool _rtl92d_phy_bb_config(struct ieee80211_hw *hw)
rtstatus = _rtl92d_phy_config_bb_with_pgheaderfile(hw, rtstatus = _rtl92d_phy_config_bb_with_pgheaderfile(hw,
BASEBAND_CONFIG_PHY_REG); BASEBAND_CONFIG_PHY_REG);
} }
if (rtstatus != true) { if (!rtstatus) {
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "BB_PG Reg Fail!!\n"); RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "BB_PG Reg Fail!!\n");
return false; return false;
} }
rtstatus = _rtl92d_phy_config_bb_with_headerfile(hw, rtstatus = _rtl92d_phy_config_bb_with_headerfile(hw,
BASEBAND_CONFIG_AGC_TAB); BASEBAND_CONFIG_AGC_TAB);
if (rtstatus != true) { if (!rtstatus) {
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "AGC Table Fail\n"); RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "AGC Table Fail\n");
return false; return false;
} }
@ -1129,7 +1129,7 @@ void rtl92d_phy_set_txpower_level(struct ieee80211_hw *hw, u8 channel)
struct rtl_priv *rtlpriv = rtl_priv(hw); struct rtl_priv *rtlpriv = rtl_priv(hw);
u8 cckpowerlevel[2], ofdmpowerlevel[2]; u8 cckpowerlevel[2], ofdmpowerlevel[2];
if (rtlefuse->txpwr_fromeprom == false) if (!rtlefuse->txpwr_fromeprom)
return; return;
channel = _rtl92c_phy_get_rightchnlplace(channel); channel = _rtl92c_phy_get_rightchnlplace(channel);
_rtl92d_get_txpower_index(hw, channel, &cckpowerlevel[0], _rtl92d_get_txpower_index(hw, channel, &cckpowerlevel[0],
@ -3320,8 +3320,7 @@ bool rtl92d_phy_set_rf_power_state(struct ieee80211_hw *hw,
RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG, RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG,
"IPS Set eRf nic enable\n"); "IPS Set eRf nic enable\n");
rtstatus = rtl_ps_enable_nic(hw); rtstatus = rtl_ps_enable_nic(hw);
} while ((rtstatus != true) && } while (!rtstatus && (InitializeCount < 10));
(InitializeCount < 10));
RT_CLEAR_PS_LEVEL(ppsc, RT_CLEAR_PS_LEVEL(ppsc,
RT_RF_OFF_LEVL_HALT_NIC); RT_RF_OFF_LEVL_HALT_NIC);

View File

@ -601,7 +601,7 @@ bool rtl92d_phy_rf6052_config(struct ieee80211_hw *hw)
u4_regvalue); u4_regvalue);
break; break;
} }
if (rtstatus != true) { if (!rtstatus) {
RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
"Radio[%d] Fail!!", rfpath); "Radio[%d] Fail!!", rfpath);
goto phy_rf_cfg_fail; goto phy_rf_cfg_fail;

View File

@ -272,7 +272,7 @@ static bool _rtl92s_firmware_checkready(struct ieee80211_hw *hw,
/* Turn On CPU */ /* Turn On CPU */
rtstatus = _rtl92s_firmware_enable_cpu(hw); rtstatus = _rtl92s_firmware_enable_cpu(hw);
if (rtstatus != true) { if (!rtstatus) {
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
"Enable CPU fail!\n"); "Enable CPU fail!\n");
goto status_check_fail; goto status_check_fail;
@ -445,14 +445,14 @@ int rtl92s_download_fw(struct ieee80211_hw *hw)
rtstatus = _rtl92s_firmware_downloadcode(hw, puc_mappedfile, rtstatus = _rtl92s_firmware_downloadcode(hw, puc_mappedfile,
ul_filelength); ul_filelength);
if (rtstatus != true) { if (!rtstatus) {
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "fail!\n"); RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "fail!\n");
goto fail; goto fail;
} }
/* <3> Check whether load FW process is ready */ /* <3> Check whether load FW process is ready */
rtstatus = _rtl92s_firmware_checkready(hw, fwstatus); rtstatus = _rtl92s_firmware_checkready(hw, fwstatus);
if (rtstatus != true) { if (!rtstatus) {
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "fail!\n"); RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "fail!\n");
goto fail; goto fail;
} }

View File

@ -962,7 +962,7 @@ int rtl92se_hw_init(struct ieee80211_hw *hw)
rtlhal->fwcmd_ioparam = rtl_read_dword(rtlpriv, LBUS_ADDR_MASK); rtlhal->fwcmd_ioparam = rtl_read_dword(rtlpriv, LBUS_ADDR_MASK);
/* 3. Initialize MAC/PHY Config by MACPHY_reg.txt */ /* 3. Initialize MAC/PHY Config by MACPHY_reg.txt */
if (rtl92s_phy_mac_config(hw) != true) { if (!rtl92s_phy_mac_config(hw)) {
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "MAC Config failed\n"); RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "MAC Config failed\n");
return rtstatus; return rtstatus;
} }
@ -972,7 +972,7 @@ int rtl92se_hw_init(struct ieee80211_hw *hw)
rtl_write_dword(rtlpriv, CMDR, 0x37FC); rtl_write_dword(rtlpriv, CMDR, 0x37FC);
/* 4. Initialize BB After MAC Config PHY_reg.txt, AGC_Tab.txt */ /* 4. Initialize BB After MAC Config PHY_reg.txt, AGC_Tab.txt */
if (rtl92s_phy_bb_config(hw) != true) { if (!rtl92s_phy_bb_config(hw)) {
RT_TRACE(rtlpriv, COMP_INIT, DBG_EMERG, "BB Config failed\n"); RT_TRACE(rtlpriv, COMP_INIT, DBG_EMERG, "BB Config failed\n");
return rtstatus; return rtstatus;
} }
@ -1008,7 +1008,7 @@ int rtl92se_hw_init(struct ieee80211_hw *hw)
else else
rtl_write_byte(rtlpriv, RF_CTRL, 0x07); rtl_write_byte(rtlpriv, RF_CTRL, 0x07);
if (rtl92s_phy_rf_config(hw) != true) { if (!rtl92s_phy_rf_config(hw)) {
RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "RF Config failed\n"); RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "RF Config failed\n");
return rtstatus; return rtstatus;
} }
@ -1105,7 +1105,7 @@ void rtl92se_set_check_bssid(struct ieee80211_hw *hw, bool check_bssid)
if (check_bssid) { if (check_bssid) {
reg_rcr |= (RCR_CBSSID); reg_rcr |= (RCR_CBSSID);
rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_RCR, (u8 *)(&reg_rcr)); rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_RCR, (u8 *)(&reg_rcr));
} else if (check_bssid == false) { } else if (!check_bssid) {
reg_rcr &= (~RCR_CBSSID); reg_rcr &= (~RCR_CBSSID);
rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_RCR, (u8 *)(&reg_rcr)); rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_RCR, (u8 *)(&reg_rcr));
} }
@ -2306,7 +2306,7 @@ bool rtl92se_gpio_radio_on_off_checking(struct ieee80211_hw *hw, u8 *valid)
rfpwr_toset = ERFON; rfpwr_toset = ERFON;
ppsc->hwradiooff = false; ppsc->hwradiooff = false;
actuallyset = true; actuallyset = true;
} else if ((ppsc->hwradiooff == false) && (rfpwr_toset == ERFOFF)) { } else if ((!ppsc->hwradiooff) && (rfpwr_toset == ERFOFF)) {
RT_TRACE(rtlpriv, COMP_RF, RT_TRACE(rtlpriv, COMP_RF,
DBG_DMESG, "RFKILL-HW Radio OFF, RF OFF\n"); DBG_DMESG, "RFKILL-HW Radio OFF, RF OFF\n");

View File

@ -558,8 +558,7 @@ bool rtl92s_phy_set_rf_power_state(struct ieee80211_hw *hw,
RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG, RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG,
"IPS Set eRf nic enable\n"); "IPS Set eRf nic enable\n");
rtstatus = rtl_ps_enable_nic(hw); rtstatus = rtl_ps_enable_nic(hw);
} while ((rtstatus != true) && } while (!rtstatus && (InitializeCount < 10));
(InitializeCount < 10));
RT_CLEAR_PS_LEVEL(ppsc, RT_CLEAR_PS_LEVEL(ppsc,
RT_RF_OFF_LEVL_HALT_NIC); RT_RF_OFF_LEVL_HALT_NIC);
@ -990,7 +989,7 @@ static bool _rtl92s_phy_bb_config_parafile(struct ieee80211_hw *hw)
rtstatus = false; rtstatus = false;
} }
if (rtstatus != true) { if (!rtstatus) {
RT_TRACE(rtlpriv, COMP_INIT, DBG_EMERG, RT_TRACE(rtlpriv, COMP_INIT, DBG_EMERG,
"Write BB Reg Fail!!\n"); "Write BB Reg Fail!!\n");
goto phy_BB8190_Config_ParaFile_Fail; goto phy_BB8190_Config_ParaFile_Fail;
@ -1004,7 +1003,7 @@ static bool _rtl92s_phy_bb_config_parafile(struct ieee80211_hw *hw)
rtstatus = _rtl92s_phy_config_bb_with_pg(hw, rtstatus = _rtl92s_phy_config_bb_with_pg(hw,
BASEBAND_CONFIG_PHY_REG); BASEBAND_CONFIG_PHY_REG);
} }
if (rtstatus != true) { if (!rtstatus) {
RT_TRACE(rtlpriv, COMP_INIT, DBG_EMERG, RT_TRACE(rtlpriv, COMP_INIT, DBG_EMERG,
"_rtl92s_phy_bb_config_parafile(): BB_PG Reg Fail!!\n"); "_rtl92s_phy_bb_config_parafile(): BB_PG Reg Fail!!\n");
goto phy_BB8190_Config_ParaFile_Fail; goto phy_BB8190_Config_ParaFile_Fail;
@ -1013,7 +1012,7 @@ static bool _rtl92s_phy_bb_config_parafile(struct ieee80211_hw *hw)
/* 3. BB AGC table Initialization */ /* 3. BB AGC table Initialization */
rtstatus = _rtl92s_phy_config_bb(hw, BASEBAND_CONFIG_AGC_TAB); rtstatus = _rtl92s_phy_config_bb(hw, BASEBAND_CONFIG_AGC_TAB);
if (rtstatus != true) { if (!rtstatus) {
pr_err("%s(): AGC Table Fail\n", __func__); pr_err("%s(): AGC Table Fail\n", __func__);
goto phy_BB8190_Config_ParaFile_Fail; goto phy_BB8190_Config_ParaFile_Fail;
} }
@ -1270,7 +1269,7 @@ void rtl92s_phy_set_txpower(struct ieee80211_hw *hw, u8 channel)
/* [0]:RF-A, [1]:RF-B */ /* [0]:RF-A, [1]:RF-B */
u8 cckpowerlevel[2], ofdmpowerLevel[2]; u8 cckpowerlevel[2], ofdmpowerLevel[2];
if (rtlefuse->txpwr_fromeprom == false) if (!rtlefuse->txpwr_fromeprom)
return; return;
/* Mainly we use RF-A Tx Power to write the Tx Power registers, /* Mainly we use RF-A Tx Power to write the Tx Power registers,
@ -1621,7 +1620,7 @@ bool rtl92s_phy_set_fw_cmd(struct ieee80211_hw *hw, enum fwcmd_iotype fw_cmdio)
break; break;
case FW_CMD_HIGH_PWR_ENABLE: case FW_CMD_HIGH_PWR_ENABLE:
if (!(rtlpriv->dm.dm_flag & HAL_DM_HIPWR_DISABLE) && if (!(rtlpriv->dm.dm_flag & HAL_DM_HIPWR_DISABLE) &&
(rtlpriv->dm.dynamic_txpower_enable != true)) { !rtlpriv->dm.dynamic_txpower_enable) {
fw_cmdmap |= (FW_HIGH_PWR_ENABLE_CTL | fw_cmdmap |= (FW_HIGH_PWR_ENABLE_CTL |
FW_SS_CTL); FW_SS_CTL);
FW_CMD_IO_SET(rtlpriv, fw_cmdmap); FW_CMD_IO_SET(rtlpriv, fw_cmdmap);

View File

@ -499,7 +499,7 @@ bool rtl92s_phy_rf6052_config(struct ieee80211_hw *hw)
break; break;
} }
if (rtstatus != true) { if (!rtstatus) {
pr_err("Radio[%d] Fail!!\n", rfpath); pr_err("Radio[%d] Fail!!\n", rfpath);
goto fail; goto fail;
} }