mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-24 20:30:53 +07:00
drivers/net: Remove boolean comparisons to true/false
Booleans should not be compared to true or false but be directly tested or tested with !. Done via cocci script: @@ bool t; @@ - t == true + t @@ bool t; @@ - t != true + !t @@ bool t; @@ - t == false + !t @@ bool t; @@ - t != false + t Signed-off-by: Joe Perches <joe@perches.com> Reviewed-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
parent
1a0d6ae579
commit
23677ce317
@ -614,8 +614,7 @@ static inline void bnx2x_igu_clear_sb_gen(struct bnx2x *bp, u8 func,
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u32 igu_addr_ctl = IGU_REG_COMMAND_REG_CTRL;
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u32 igu_addr_ack = IGU_REG_CSTORM_TYPE_0_SB_CLEANUP + (idu_sb_id/32)*4;
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u32 sb_bit = 1 << (idu_sb_id%32);
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u32 func_encode = func |
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((is_Pf == true ? 1 : 0) << IGU_FID_ENCODE_IS_PF_SHIFT);
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u32 func_encode = func | (is_Pf ? 1 : 0) << IGU_FID_ENCODE_IS_PF_SHIFT;
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u32 addr_encode = IGU_CMD_E2_PROD_UPD_BASE + idu_sb_id;
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/* Not supported in BC mode */
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@ -203,7 +203,7 @@ bfa_nw_cee_get_attr(struct bfa_cee *cee, struct bfa_cee_attr *attr,
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if (!bfa_nw_ioc_is_operational(cee->ioc))
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return BFA_STATUS_IOC_FAILURE;
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if (cee->get_attr_pending == true)
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if (cee->get_attr_pending)
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return BFA_STATUS_DEVBUSY;
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cee->get_attr_pending = true;
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@ -272,7 +272,7 @@ bfa_cee_notify(void *arg, enum bfa_ioc_event event)
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switch (event) {
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case BFA_IOC_E_DISABLED:
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case BFA_IOC_E_FAILED:
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if (cee->get_attr_pending == true) {
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if (cee->get_attr_pending) {
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cee->get_attr_status = BFA_STATUS_FAILED;
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cee->get_attr_pending = false;
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if (cee->cbfn.get_attr_cbfn) {
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@ -281,7 +281,7 @@ bfa_cee_notify(void *arg, enum bfa_ioc_event event)
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BFA_STATUS_FAILED);
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}
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}
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if (cee->get_stats_pending == true) {
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if (cee->get_stats_pending) {
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cee->get_stats_status = BFA_STATUS_FAILED;
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cee->get_stats_pending = false;
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if (cee->cbfn.get_stats_cbfn) {
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@ -290,7 +290,7 @@ bfa_cee_notify(void *arg, enum bfa_ioc_event event)
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BFA_STATUS_FAILED);
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}
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}
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if (cee->reset_stats_pending == true) {
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if (cee->reset_stats_pending) {
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cee->reset_stats_status = BFA_STATUS_FAILED;
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cee->reset_stats_pending = false;
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if (cee->cbfn.reset_stats_cbfn) {
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@ -692,7 +692,7 @@ static void
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bfa_iocpf_sm_mismatch_entry(struct bfa_iocpf *iocpf)
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{
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/* Call only the first time sm enters fwmismatch state. */
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if (iocpf->fw_mismatch_notified == false)
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if (!iocpf->fw_mismatch_notified)
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bfa_ioc_pf_fwmismatch(iocpf->ioc);
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iocpf->fw_mismatch_notified = true;
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@ -533,10 +533,8 @@ __le16
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ixgb_get_eeprom_word(struct ixgb_hw *hw, u16 index)
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{
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if ((index < IXGB_EEPROM_SIZE) &&
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(ixgb_check_and_get_eeprom_data(hw) == true)) {
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return hw->eeprom[index];
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}
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if (index < IXGB_EEPROM_SIZE && ixgb_check_and_get_eeprom_data(hw))
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return hw->eeprom[index];
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return 0;
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}
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@ -558,7 +556,7 @@ ixgb_get_ee_mac_addr(struct ixgb_hw *hw,
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ENTER();
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if (ixgb_check_and_get_eeprom_data(hw) == true) {
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if (ixgb_check_and_get_eeprom_data(hw)) {
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for (i = 0; i < ETH_ALEN; i++) {
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mac_addr[i] = ee_map->mac_addr[i];
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}
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@ -578,7 +576,7 @@ ixgb_get_ee_mac_addr(struct ixgb_hw *hw,
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u32
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ixgb_get_ee_pba_number(struct ixgb_hw *hw)
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{
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if (ixgb_check_and_get_eeprom_data(hw) == true)
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if (ixgb_check_and_get_eeprom_data(hw))
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return le16_to_cpu(hw->eeprom[EEPROM_PBA_1_2_REG])
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| (le16_to_cpu(hw->eeprom[EEPROM_PBA_3_4_REG])<<16);
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@ -599,7 +597,7 @@ ixgb_get_ee_device_id(struct ixgb_hw *hw)
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{
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struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom;
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if (ixgb_check_and_get_eeprom_data(hw) == true)
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if (ixgb_check_and_get_eeprom_data(hw))
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return le16_to_cpu(ee_map->device_id);
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return 0;
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@ -617,7 +617,7 @@ static s32 ixgbe_check_mac_link_82598(struct ixgbe_hw *hw,
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*link_up = false;
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}
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if (*link_up == false)
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if (!*link_up)
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goto out;
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}
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@ -645,7 +645,7 @@ static s32 ixgbe_check_mac_link_82598(struct ixgbe_hw *hw,
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else
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*speed = IXGBE_LINK_SPEED_1GB_FULL;
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if ((hw->device_id == IXGBE_DEV_ID_82598AT2) && (*link_up == true) &&
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if ((hw->device_id == IXGBE_DEV_ID_82598AT2) && *link_up &&
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(ixgbe_validate_link_ready(hw) != 0))
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*link_up = false;
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@ -258,7 +258,7 @@ static void ixgbe_restore_vf_macvlans(struct ixgbe_adapter *adapter)
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list_for_each(pos, &adapter->vf_mvs.l) {
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entry = list_entry(pos, struct vf_macvlans, l);
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if (entry->free == false)
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if (!entry->free)
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hw->mac.ops.set_rar(hw, entry->rar_entry,
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entry->vf_macvlan,
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entry->vf, IXGBE_RAH_AV);
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@ -760,7 +760,7 @@ static s32 ixgbe_blink_led_start_X540(struct ixgbe_hw *hw, u32 index)
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* This will be reversed when we stop the blinking.
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*/
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hw->mac.ops.check_link(hw, &speed, &link_up, false);
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if (link_up == false) {
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if (!link_up) {
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macc_reg = IXGBE_READ_REG(hw, IXGBE_MACC);
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macc_reg |= IXGBE_MACC_FLU | IXGBE_MACC_FSV_10G | IXGBE_MACC_FS;
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IXGBE_WRITE_REG(hw, IXGBE_MACC, macc_reg);
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@ -1224,7 +1224,7 @@ static irqreturn_t pch_gbe_intr(int irq, void *data)
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/* When request status is Receive interruption */
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if ((int_st & (PCH_GBE_INT_RX_DMA_CMPLT | PCH_GBE_INT_TX_CMPLT)) ||
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(adapter->rx_stop_flag == true)) {
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(adapter->rx_stop_flag)) {
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if (likely(napi_schedule_prep(&adapter->napi))) {
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/* Enable only Rx Descriptor empty */
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atomic_inc(&adapter->irq_sem);
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@ -355,8 +355,7 @@ static void bcm54xx_adjust_rxrefclk(struct phy_device *phydev)
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}
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}
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if (clk125en == false ||
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(phydev->dev_flags & PHY_BRCM_AUTO_PWRDWN_ENABLE))
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if (!clk125en || (phydev->dev_flags & PHY_BRCM_AUTO_PWRDWN_ENABLE))
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val &= ~BCM54XX_SHD_SCR3_DLLAPD_DIS;
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else
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val |= BCM54XX_SHD_SCR3_DLLAPD_DIS;
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@ -373,8 +372,7 @@ static void bcm54xx_adjust_rxrefclk(struct phy_device *phydev)
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orig = val;
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if (clk125en == false ||
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(phydev->dev_flags & PHY_BRCM_AUTO_PWRDWN_ENABLE))
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if (!clk125en || (phydev->dev_flags & PHY_BRCM_AUTO_PWRDWN_ENABLE))
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val |= BCM54XX_SHD_APD_EN;
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else
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val &= ~BCM54XX_SHD_APD_EN;
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@ -257,7 +257,7 @@ ath5k_ani_raise_immunity(struct ath5k_hw *ah, struct ath5k_ani_state *as,
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"beacon RSSI high");
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/* only OFDM: beacon RSSI is high, we can disable ODFM weak
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* signal detection */
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if (ofdm_trigger && as->ofdm_weak_sig == true) {
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if (ofdm_trigger && as->ofdm_weak_sig) {
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ath5k_ani_set_ofdm_weak_signal_detection(ah, false);
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ath5k_ani_set_spur_immunity_level(ah, 0);
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return;
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@ -272,7 +272,7 @@ ath5k_ani_raise_immunity(struct ath5k_hw *ah, struct ath5k_ani_state *as,
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* but can raise firstep level */
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ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI,
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"beacon RSSI mid");
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if (ofdm_trigger && as->ofdm_weak_sig == false)
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if (ofdm_trigger && !as->ofdm_weak_sig)
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ath5k_ani_set_ofdm_weak_signal_detection(ah, true);
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if (as->firstep_level < ATH5K_ANI_MAX_FIRSTEP_LVL)
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ath5k_ani_set_firstep_level(ah, as->firstep_level + 1);
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@ -282,7 +282,7 @@ ath5k_ani_raise_immunity(struct ath5k_hw *ah, struct ath5k_ani_state *as,
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* detect and zero firstep level to maximize CCK sensitivity */
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ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI,
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"beacon RSSI low, 2GHz");
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if (ofdm_trigger && as->ofdm_weak_sig == true)
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if (ofdm_trigger && as->ofdm_weak_sig)
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ath5k_ani_set_ofdm_weak_signal_detection(ah, false);
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if (as->firstep_level > 0)
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ath5k_ani_set_firstep_level(ah, 0);
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@ -326,7 +326,7 @@ ath5k_ani_lower_immunity(struct ath5k_hw *ah, struct ath5k_ani_state *as)
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} else if (rssi > ATH5K_ANI_RSSI_THR_LOW) {
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/* beacon RSSI is mid-range: turn on ODFM weak signal
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* detection and next, lower firstep level */
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if (as->ofdm_weak_sig == false) {
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if (!as->ofdm_weak_sig) {
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ath5k_ani_set_ofdm_weak_signal_detection(ah,
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true);
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return;
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@ -407,20 +407,20 @@ static void ath9k_hw_ani_lower_immunity_old(struct ath_hw *ah)
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if (aniState->ofdmWeakSigDetectOff) {
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if (ath9k_hw_ani_control(ah,
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ATH9K_ANI_OFDM_WEAK_SIGNAL_DETECTION,
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true) == true)
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true))
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return;
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}
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if (aniState->firstepLevel > 0) {
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if (ath9k_hw_ani_control(ah,
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ATH9K_ANI_FIRSTEP_LEVEL,
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aniState->firstepLevel - 1) == true)
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aniState->firstepLevel - 1))
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return;
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}
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} else {
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if (aniState->firstepLevel > 0) {
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if (ath9k_hw_ani_control(ah,
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ATH9K_ANI_FIRSTEP_LEVEL,
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aniState->firstepLevel - 1) == true)
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aniState->firstepLevel - 1))
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return;
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}
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}
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@ -24,7 +24,7 @@
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static inline void ath9k_hw_configpcipowersave(struct ath_hw *ah,
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bool power_off)
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{
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if (ah->aspm_enabled != true)
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if (!ah->aspm_enabled)
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return;
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ath9k_hw_ops(ah)->config_pci_powersave(ah, power_off);
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@ -1600,7 +1600,7 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan,
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allow_fbs = true;
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if (bChannelChange &&
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(ah->chip_fullsleep != true) &&
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(!ah->chip_fullsleep) &&
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(ah->curchan != NULL) &&
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(chan->channel != ah->curchan->channel) &&
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(allow_fbs ||
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@ -2038,8 +2038,7 @@ static bool ath9k_hw_set_power_awake(struct ath_hw *ah, int setChip)
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if (setChip) {
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if ((REG_READ(ah, AR_RTC_STATUS) &
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AR_RTC_STATUS_M) == AR_RTC_STATUS_SHUTDOWN) {
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if (ath9k_hw_set_reset_reg(ah,
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ATH9K_RESET_POWER_ON) != true) {
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if (!ath9k_hw_set_reset_reg(ah, ATH9K_RESET_POWER_ON)) {
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return false;
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}
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if (!AR_SREV_9300_20_OR_LATER(ah))
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@ -767,7 +767,7 @@ static int brcmf_sdbrcm_htclk(struct brcmf_sdio *bus, bool on, bool pendok)
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brcmf_dbg(INFO, "CLKCTL: turned ON\n");
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#if defined(DEBUG)
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if (bus->alp_only != true) {
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if (!bus->alp_only) {
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if (SBSDIO_ALPONLY(clkctl))
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brcmf_dbg(ERROR, "HT Clock should be on\n");
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}
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@ -2059,8 +2059,7 @@ static void
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brcmf_sdbrcm_wait_for_event(struct brcmf_sdio *bus, bool *lockvar)
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{
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up(&bus->sdsem);
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wait_event_interruptible_timeout(bus->ctrl_wait,
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(*lockvar == false), HZ * 2);
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wait_event_interruptible_timeout(bus->ctrl_wait, !*lockvar, HZ * 2);
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down(&bus->sdsem);
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return;
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}
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@ -2647,8 +2646,7 @@ static int brcmf_sdbrcm_bus_txdata(struct device *dev, struct sk_buff *pkt)
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/* Priority based enq */
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spin_lock_bh(&bus->txqlock);
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if (brcmf_c_prec_enq(bus->sdiodev->dev, &bus->txq, pkt, prec) ==
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false) {
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if (!brcmf_c_prec_enq(bus->sdiodev->dev, &bus->txq, pkt, prec)) {
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skb_pull(pkt, SDPCM_HDRLEN);
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brcmf_txcomplete(bus->sdiodev->dev, pkt, false);
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brcmu_pkt_buf_free_skb(pkt);
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@ -2935,7 +2933,7 @@ brcmf_sdbrcm_bus_txctl(struct device *dev, unsigned char *msg, uint msglen)
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brcmf_sdbrcm_wait_for_event(bus, &bus->ctrl_frame_stat);
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if (bus->ctrl_frame_stat == false) {
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if (!bus->ctrl_frame_stat) {
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brcmf_dbg(INFO, "ctrl_frame_stat == false\n");
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ret = 0;
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} else {
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@ -2997,7 +2995,7 @@ brcmf_sdbrcm_bus_rxctl(struct device *dev, unsigned char *msg, uint msglen)
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rxlen, msglen);
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} else if (timeleft == 0) {
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brcmf_dbg(ERROR, "resumed on timeout\n");
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} else if (pending == true) {
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} else if (pending) {
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brcmf_dbg(CTL, "cancelled\n");
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return -ERESTARTSYS;
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} else {
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@ -3983,7 +3981,7 @@ void
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brcmf_sdbrcm_wd_timer(struct brcmf_sdio *bus, uint wdtick)
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{
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/* Totally stop the timer */
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if (!wdtick && bus->wd_timer_valid == true) {
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if (!wdtick && bus->wd_timer_valid) {
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del_timer_sync(&bus->timer);
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bus->wd_timer_valid = false;
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bus->save_ms = wdtick;
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@ -3996,7 +3994,7 @@ brcmf_sdbrcm_wd_timer(struct brcmf_sdio *bus, uint wdtick)
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if (wdtick) {
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if (bus->save_ms != BRCMF_WD_POLL_MS) {
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if (bus->wd_timer_valid == true)
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if (bus->wd_timer_valid)
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/* Stop timer and restart at new value */
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del_timer_sync(&bus->timer);
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@ -3248,7 +3248,7 @@ static void brcms_b_coreinit(struct brcms_c_info *wlc)
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}
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/* For old ucode, txfifo sizes needs to be modified(increased) */
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if (fifosz_fixup == true)
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if (fifosz_fixup)
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brcms_b_corerev_fifofixup(wlc_hw);
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/* check txfifo allocations match between ucode and driver */
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@ -5427,7 +5427,7 @@ int brcms_c_set_gmode(struct brcms_c_info *wlc, u8 gmode, bool config)
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return -EINVAL;
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/* update configuration value */
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if (config == true)
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if (config)
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brcms_c_protection_upd(wlc, BRCMS_PROT_G_USER, gmode);
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/* Clear rateset override */
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@ -21464,7 +21464,7 @@ void wlc_phy_antsel_init(struct brcms_phy_pub *ppi, bool lut_init)
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if (NREV_GE(pi->pubpi.phy_rev, 3)) {
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u16 v0 = 0x211, v1 = 0x222, v2 = 0x144, v3 = 0x188;
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if (lut_init == false)
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if (!lut_init)
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return;
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if (pi->srom_fem2g.antswctrllut == 0) {
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@ -478,7 +478,7 @@ void iwl_trans_pcie_tx_agg_setup(struct iwl_trans *trans,
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}
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txq_id = trans_pcie->agg_txq[sta_id][tid];
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if (WARN_ON_ONCE(is_agg_txqid_valid(trans, txq_id) == false)) {
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if (WARN_ON_ONCE(!is_agg_txqid_valid(trans, txq_id))) {
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IWL_ERR(trans,
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"queue number out of range: %d, must be %d to %d\n",
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txq_id, IWLAGN_FIRST_AMPDU_QUEUE,
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@ -573,7 +573,7 @@ int iwl_trans_pcie_tx_agg_disable(struct iwl_trans *trans, int sta_id, int tid)
|
||||
struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
|
||||
u8 txq_id = trans_pcie->agg_txq[sta_id][tid];
|
||||
|
||||
if (WARN_ON_ONCE(is_agg_txqid_valid(trans, txq_id) == false)) {
|
||||
if (WARN_ON_ONCE(!is_agg_txqid_valid(trans, txq_id))) {
|
||||
IWL_ERR(trans,
|
||||
"queue number out of range: %d, must be %d to %d\n",
|
||||
txq_id, IWLAGN_FIRST_AMPDU_QUEUE,
|
||||
|
@ -1330,7 +1330,7 @@ static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
|
||||
wh->addr1);
|
||||
|
||||
if (mwl8k_vif != NULL &&
|
||||
mwl8k_vif->is_hw_crypto_enabled == true) {
|
||||
mwl8k_vif->is_hw_crypto_enabled) {
|
||||
/*
|
||||
* When MMIC ERROR is encountered
|
||||
* by the firmware, payload is
|
||||
@ -1993,8 +1993,7 @@ mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb)
|
||||
*/
|
||||
|
||||
if (txq->len >= MWL8K_TX_DESCS - 2) {
|
||||
if (mgmtframe == false ||
|
||||
txq->len == MWL8K_TX_DESCS) {
|
||||
if (!mgmtframe || txq->len == MWL8K_TX_DESCS) {
|
||||
if (start_ba_session) {
|
||||
spin_lock(&priv->stream_lock);
|
||||
mwl8k_remove_stream(hw, stream);
|
||||
|
@ -777,7 +777,7 @@ static void efuse_write_data_case1(struct ieee80211_hw *hw, u16 *efuse_addr,
|
||||
dataempty = false;
|
||||
}
|
||||
|
||||
if (dataempty == false) {
|
||||
if (!dataempty) {
|
||||
*efuse_addr = *efuse_addr + (tmp_word_cnts * 2) + 1;
|
||||
*write_state = PG_STATE_HEADER;
|
||||
} else {
|
||||
|
@ -105,8 +105,7 @@ bool rtl_ps_set_rf_state(struct ieee80211_hw *hw,
|
||||
|
||||
case ERFOFF:
|
||||
|
||||
if ((changesource == RF_CHANGE_BY_HW)
|
||||
&& (ppsc->hwradiooff == false)) {
|
||||
if ((changesource == RF_CHANGE_BY_HW) && !ppsc->hwradiooff) {
|
||||
ppsc->hwradiooff = true;
|
||||
}
|
||||
|
||||
|
@ -329,8 +329,8 @@ static void rtl92c_dm_initial_gain_multi_sta(struct ieee80211_hw *hw)
|
||||
if (mac->opmode == NL80211_IFTYPE_ADHOC)
|
||||
multi_sta = true;
|
||||
|
||||
if ((multi_sta == false) || (dm_digtable.cursta_connectctate !=
|
||||
DIG_STA_DISCONNECT)) {
|
||||
if (!multi_sta ||
|
||||
dm_digtable.cursta_connectctate != DIG_STA_DISCONNECT) {
|
||||
initialized = false;
|
||||
dm_digtable.dig_ext_port_stage = DIG_EXT_PORT_STAGE_MAX;
|
||||
return;
|
||||
|
@ -216,7 +216,7 @@ bool _rtl92c_phy_bb8192c_config_parafile(struct ieee80211_hw *hw)
|
||||
RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, "==>\n");
|
||||
rtstatus = rtlpriv->cfg->ops->config_bb_with_headerfile(hw,
|
||||
BASEBAND_CONFIG_PHY_REG);
|
||||
if (rtstatus != true) {
|
||||
if (!rtstatus) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Write BB Reg Fail!!\n");
|
||||
return false;
|
||||
}
|
||||
@ -229,13 +229,13 @@ bool _rtl92c_phy_bb8192c_config_parafile(struct ieee80211_hw *hw)
|
||||
rtstatus = rtlpriv->cfg->ops->config_bb_with_pgheaderfile(hw,
|
||||
BASEBAND_CONFIG_PHY_REG);
|
||||
}
|
||||
if (rtstatus != true) {
|
||||
if (!rtstatus) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "BB_PG Reg Fail!!\n");
|
||||
return false;
|
||||
}
|
||||
rtstatus = rtlpriv->cfg->ops->config_bb_with_headerfile(hw,
|
||||
BASEBAND_CONFIG_AGC_TAB);
|
||||
if (rtstatus != true) {
|
||||
if (!rtstatus) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "AGC Table Fail\n");
|
||||
return false;
|
||||
}
|
||||
@ -580,7 +580,7 @@ void rtl92c_phy_set_txpower_level(struct ieee80211_hw *hw, u8 channel)
|
||||
struct rtl_efuse *rtlefuse = rtl_efuse(rtlpriv);
|
||||
u8 cckpowerlevel[2], ofdmpowerlevel[2];
|
||||
|
||||
if (rtlefuse->txpwr_fromeprom == false)
|
||||
if (!rtlefuse->txpwr_fromeprom)
|
||||
return;
|
||||
_rtl92c_get_txpower_index(hw, channel,
|
||||
&cckpowerlevel[0], &ofdmpowerlevel[0]);
|
||||
|
@ -693,7 +693,7 @@ static bool _rtl92ce_init_mac(struct ieee80211_hw *hw)
|
||||
|
||||
rtl_write_word(rtlpriv, REG_CR, 0x2ff);
|
||||
|
||||
if (_rtl92ce_llt_table_init(hw) == false)
|
||||
if (!_rtl92ce_llt_table_init(hw))
|
||||
return false;
|
||||
|
||||
rtl_write_dword(rtlpriv, REG_HISR, 0xffffffff);
|
||||
@ -906,7 +906,7 @@ int rtl92ce_hw_init(struct ieee80211_hw *hw)
|
||||
rtlpci->being_init_adapter = true;
|
||||
rtlpriv->intf_ops->disable_aspm(hw);
|
||||
rtstatus = _rtl92ce_init_mac(hw);
|
||||
if (rtstatus != true) {
|
||||
if (!rtstatus) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Init MAC failed\n");
|
||||
err = 1;
|
||||
return err;
|
||||
@ -1117,7 +1117,7 @@ void rtl92ce_set_check_bssid(struct ieee80211_hw *hw, bool check_bssid)
|
||||
rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_RCR,
|
||||
(u8 *) (®_rcr));
|
||||
_rtl92ce_set_bcn_ctrl_reg(hw, 0, BIT(4));
|
||||
} else if (check_bssid == false) {
|
||||
} else if (!check_bssid) {
|
||||
reg_rcr &= (~(RCR_CBSSID_DATA | RCR_CBSSID_BCN));
|
||||
_rtl92ce_set_bcn_ctrl_reg(hw, BIT(4), 0);
|
||||
rtlpriv->cfg->ops->set_hw_reg(hw,
|
||||
@ -1985,8 +1985,7 @@ bool rtl92ce_gpio_radio_on_off_checking(struct ieee80211_hw *hw, u8 *valid)
|
||||
e_rfpowerstate_toset = ERFON;
|
||||
ppsc->hwradiooff = false;
|
||||
actuallyset = true;
|
||||
} else if ((ppsc->hwradiooff == false)
|
||||
&& (e_rfpowerstate_toset == ERFOFF)) {
|
||||
} else if (!ppsc->hwradiooff && (e_rfpowerstate_toset == ERFOFF)) {
|
||||
RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG,
|
||||
"GPIOChangeRF - HW Radio OFF, RF OFF\n");
|
||||
|
||||
|
@ -522,8 +522,7 @@ static bool _rtl92ce_phy_set_rf_power_state(struct ieee80211_hw *hw,
|
||||
RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG,
|
||||
"IPS Set eRf nic enable\n");
|
||||
rtstatus = rtl_ps_enable_nic(hw);
|
||||
} while ((rtstatus != true)
|
||||
&& (InitializeCount < 10));
|
||||
} while (!rtstatus && (InitializeCount < 10));
|
||||
RT_CLEAR_PS_LEVEL(ppsc,
|
||||
RT_RF_OFF_LEVL_HALT_NIC);
|
||||
} else {
|
||||
|
@ -503,7 +503,7 @@ static bool _rtl92ce_phy_rf6052_config_parafile(struct ieee80211_hw *hw)
|
||||
break;
|
||||
}
|
||||
|
||||
if (rtstatus != true) {
|
||||
if (!rtstatus) {
|
||||
RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
|
||||
"Radio[%d] Fail!!\n", rfpath);
|
||||
return false;
|
||||
|
@ -477,8 +477,7 @@ static bool _rtl92cu_phy_set_rf_power_state(struct ieee80211_hw *hw,
|
||||
RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG,
|
||||
"IPS Set eRf nic enable\n");
|
||||
rtstatus = rtl_ps_enable_nic(hw);
|
||||
} while ((rtstatus != true)
|
||||
&& (InitializeCount < 10));
|
||||
} while (!rtstatus && (InitializeCount < 10));
|
||||
RT_CLEAR_PS_LEVEL(ppsc,
|
||||
RT_RF_OFF_LEVL_HALT_NIC);
|
||||
} else {
|
||||
|
@ -479,7 +479,7 @@ static bool _rtl92c_phy_rf6052_config_parafile(struct ieee80211_hw *hw)
|
||||
BRFSI_RFENV << 16, u4_regvalue);
|
||||
break;
|
||||
}
|
||||
if (rtstatus != true) {
|
||||
if (!rtstatus) {
|
||||
RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
|
||||
"Radio[%d] Fail!!", rfpath);
|
||||
goto phy_rf_cfg_fail;
|
||||
|
@ -405,7 +405,7 @@ static void rtl92d_dm_dig(struct ieee80211_hw *hw)
|
||||
de_digtable.last_min_undecorated_pwdb_for_dm =
|
||||
de_digtable.min_undecorated_pwdb_for_dm;
|
||||
}
|
||||
if (rtlpriv->dm.dm_initialgain_enable == false)
|
||||
if (!rtlpriv->dm.dm_initialgain_enable)
|
||||
return;
|
||||
|
||||
/* because we will send data pkt when scanning
|
||||
|
@ -707,7 +707,7 @@ static bool _rtl92de_init_mac(struct ieee80211_hw *hw)
|
||||
|
||||
/* System init */
|
||||
/* 18. LLT_table_init(Adapter); */
|
||||
if (_rtl92de_llt_table_init(hw) == false)
|
||||
if (!_rtl92de_llt_table_init(hw))
|
||||
return false;
|
||||
|
||||
/* Clear interrupt and enable interrupt */
|
||||
@ -920,7 +920,7 @@ int rtl92de_hw_init(struct ieee80211_hw *hw)
|
||||
rtl92d_phy_reset_iqk_result(hw);
|
||||
/* rtlpriv->intf_ops->disable_aspm(hw); */
|
||||
rtstatus = _rtl92de_init_mac(hw);
|
||||
if (rtstatus != true) {
|
||||
if (!rtstatus) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Init MAC failed\n");
|
||||
err = 1;
|
||||
spin_unlock_irqrestore(&globalmutex_for_power_and_efuse, flags);
|
||||
@ -1147,7 +1147,7 @@ void rtl92de_set_check_bssid(struct ieee80211_hw *hw, bool check_bssid)
|
||||
reg_rcr |= (RCR_CBSSID_DATA | RCR_CBSSID_BCN);
|
||||
rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_RCR, (u8 *)(®_rcr));
|
||||
_rtl92de_set_bcn_ctrl_reg(hw, 0, BIT(4));
|
||||
} else if (check_bssid == false) {
|
||||
} else if (!check_bssid) {
|
||||
reg_rcr &= (~(RCR_CBSSID_DATA | RCR_CBSSID_BCN));
|
||||
_rtl92de_set_bcn_ctrl_reg(hw, BIT(4), 0);
|
||||
rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_RCR, (u8 *)(®_rcr));
|
||||
@ -2151,8 +2151,7 @@ bool rtl92de_gpio_radio_on_off_checking(struct ieee80211_hw *hw, u8 *valid)
|
||||
e_rfpowerstate_toset = ERFON;
|
||||
ppsc->hwradiooff = false;
|
||||
actuallyset = true;
|
||||
} else if ((ppsc->hwradiooff == false)
|
||||
&& (e_rfpowerstate_toset == ERFOFF)) {
|
||||
} else if (!ppsc->hwradiooff && (e_rfpowerstate_toset == ERFOFF)) {
|
||||
RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG,
|
||||
"GPIOChangeRF - HW Radio OFF, RF OFF\n");
|
||||
e_rfpowerstate_toset = ERFOFF;
|
||||
|
@ -859,7 +859,7 @@ static bool _rtl92d_phy_bb_config(struct ieee80211_hw *hw)
|
||||
RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, "==>\n");
|
||||
rtstatus = _rtl92d_phy_config_bb_with_headerfile(hw,
|
||||
BASEBAND_CONFIG_PHY_REG);
|
||||
if (rtstatus != true) {
|
||||
if (!rtstatus) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Write BB Reg Fail!!\n");
|
||||
return false;
|
||||
}
|
||||
@ -874,13 +874,13 @@ static bool _rtl92d_phy_bb_config(struct ieee80211_hw *hw)
|
||||
rtstatus = _rtl92d_phy_config_bb_with_pgheaderfile(hw,
|
||||
BASEBAND_CONFIG_PHY_REG);
|
||||
}
|
||||
if (rtstatus != true) {
|
||||
if (!rtstatus) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "BB_PG Reg Fail!!\n");
|
||||
return false;
|
||||
}
|
||||
rtstatus = _rtl92d_phy_config_bb_with_headerfile(hw,
|
||||
BASEBAND_CONFIG_AGC_TAB);
|
||||
if (rtstatus != true) {
|
||||
if (!rtstatus) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "AGC Table Fail\n");
|
||||
return false;
|
||||
}
|
||||
@ -1129,7 +1129,7 @@ void rtl92d_phy_set_txpower_level(struct ieee80211_hw *hw, u8 channel)
|
||||
struct rtl_priv *rtlpriv = rtl_priv(hw);
|
||||
u8 cckpowerlevel[2], ofdmpowerlevel[2];
|
||||
|
||||
if (rtlefuse->txpwr_fromeprom == false)
|
||||
if (!rtlefuse->txpwr_fromeprom)
|
||||
return;
|
||||
channel = _rtl92c_phy_get_rightchnlplace(channel);
|
||||
_rtl92d_get_txpower_index(hw, channel, &cckpowerlevel[0],
|
||||
@ -3320,8 +3320,7 @@ bool rtl92d_phy_set_rf_power_state(struct ieee80211_hw *hw,
|
||||
RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG,
|
||||
"IPS Set eRf nic enable\n");
|
||||
rtstatus = rtl_ps_enable_nic(hw);
|
||||
} while ((rtstatus != true) &&
|
||||
(InitializeCount < 10));
|
||||
} while (!rtstatus && (InitializeCount < 10));
|
||||
|
||||
RT_CLEAR_PS_LEVEL(ppsc,
|
||||
RT_RF_OFF_LEVL_HALT_NIC);
|
||||
|
@ -601,7 +601,7 @@ bool rtl92d_phy_rf6052_config(struct ieee80211_hw *hw)
|
||||
u4_regvalue);
|
||||
break;
|
||||
}
|
||||
if (rtstatus != true) {
|
||||
if (!rtstatus) {
|
||||
RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
|
||||
"Radio[%d] Fail!!", rfpath);
|
||||
goto phy_rf_cfg_fail;
|
||||
|
@ -272,7 +272,7 @@ static bool _rtl92s_firmware_checkready(struct ieee80211_hw *hw,
|
||||
|
||||
/* Turn On CPU */
|
||||
rtstatus = _rtl92s_firmware_enable_cpu(hw);
|
||||
if (rtstatus != true) {
|
||||
if (!rtstatus) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
|
||||
"Enable CPU fail!\n");
|
||||
goto status_check_fail;
|
||||
@ -445,14 +445,14 @@ int rtl92s_download_fw(struct ieee80211_hw *hw)
|
||||
rtstatus = _rtl92s_firmware_downloadcode(hw, puc_mappedfile,
|
||||
ul_filelength);
|
||||
|
||||
if (rtstatus != true) {
|
||||
if (!rtstatus) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "fail!\n");
|
||||
goto fail;
|
||||
}
|
||||
|
||||
/* <3> Check whether load FW process is ready */
|
||||
rtstatus = _rtl92s_firmware_checkready(hw, fwstatus);
|
||||
if (rtstatus != true) {
|
||||
if (!rtstatus) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "fail!\n");
|
||||
goto fail;
|
||||
}
|
||||
|
@ -962,7 +962,7 @@ int rtl92se_hw_init(struct ieee80211_hw *hw)
|
||||
rtlhal->fwcmd_ioparam = rtl_read_dword(rtlpriv, LBUS_ADDR_MASK);
|
||||
|
||||
/* 3. Initialize MAC/PHY Config by MACPHY_reg.txt */
|
||||
if (rtl92s_phy_mac_config(hw) != true) {
|
||||
if (!rtl92s_phy_mac_config(hw)) {
|
||||
RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "MAC Config failed\n");
|
||||
return rtstatus;
|
||||
}
|
||||
@ -972,7 +972,7 @@ int rtl92se_hw_init(struct ieee80211_hw *hw)
|
||||
rtl_write_dword(rtlpriv, CMDR, 0x37FC);
|
||||
|
||||
/* 4. Initialize BB After MAC Config PHY_reg.txt, AGC_Tab.txt */
|
||||
if (rtl92s_phy_bb_config(hw) != true) {
|
||||
if (!rtl92s_phy_bb_config(hw)) {
|
||||
RT_TRACE(rtlpriv, COMP_INIT, DBG_EMERG, "BB Config failed\n");
|
||||
return rtstatus;
|
||||
}
|
||||
@ -1008,7 +1008,7 @@ int rtl92se_hw_init(struct ieee80211_hw *hw)
|
||||
else
|
||||
rtl_write_byte(rtlpriv, RF_CTRL, 0x07);
|
||||
|
||||
if (rtl92s_phy_rf_config(hw) != true) {
|
||||
if (!rtl92s_phy_rf_config(hw)) {
|
||||
RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "RF Config failed\n");
|
||||
return rtstatus;
|
||||
}
|
||||
@ -1105,7 +1105,7 @@ void rtl92se_set_check_bssid(struct ieee80211_hw *hw, bool check_bssid)
|
||||
if (check_bssid) {
|
||||
reg_rcr |= (RCR_CBSSID);
|
||||
rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_RCR, (u8 *)(®_rcr));
|
||||
} else if (check_bssid == false) {
|
||||
} else if (!check_bssid) {
|
||||
reg_rcr &= (~RCR_CBSSID);
|
||||
rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_RCR, (u8 *)(®_rcr));
|
||||
}
|
||||
@ -2306,7 +2306,7 @@ bool rtl92se_gpio_radio_on_off_checking(struct ieee80211_hw *hw, u8 *valid)
|
||||
rfpwr_toset = ERFON;
|
||||
ppsc->hwradiooff = false;
|
||||
actuallyset = true;
|
||||
} else if ((ppsc->hwradiooff == false) && (rfpwr_toset == ERFOFF)) {
|
||||
} else if ((!ppsc->hwradiooff) && (rfpwr_toset == ERFOFF)) {
|
||||
RT_TRACE(rtlpriv, COMP_RF,
|
||||
DBG_DMESG, "RFKILL-HW Radio OFF, RF OFF\n");
|
||||
|
||||
|
@ -558,8 +558,7 @@ bool rtl92s_phy_set_rf_power_state(struct ieee80211_hw *hw,
|
||||
RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG,
|
||||
"IPS Set eRf nic enable\n");
|
||||
rtstatus = rtl_ps_enable_nic(hw);
|
||||
} while ((rtstatus != true) &&
|
||||
(InitializeCount < 10));
|
||||
} while (!rtstatus && (InitializeCount < 10));
|
||||
|
||||
RT_CLEAR_PS_LEVEL(ppsc,
|
||||
RT_RF_OFF_LEVL_HALT_NIC);
|
||||
@ -990,7 +989,7 @@ static bool _rtl92s_phy_bb_config_parafile(struct ieee80211_hw *hw)
|
||||
rtstatus = false;
|
||||
}
|
||||
|
||||
if (rtstatus != true) {
|
||||
if (!rtstatus) {
|
||||
RT_TRACE(rtlpriv, COMP_INIT, DBG_EMERG,
|
||||
"Write BB Reg Fail!!\n");
|
||||
goto phy_BB8190_Config_ParaFile_Fail;
|
||||
@ -1004,7 +1003,7 @@ static bool _rtl92s_phy_bb_config_parafile(struct ieee80211_hw *hw)
|
||||
rtstatus = _rtl92s_phy_config_bb_with_pg(hw,
|
||||
BASEBAND_CONFIG_PHY_REG);
|
||||
}
|
||||
if (rtstatus != true) {
|
||||
if (!rtstatus) {
|
||||
RT_TRACE(rtlpriv, COMP_INIT, DBG_EMERG,
|
||||
"_rtl92s_phy_bb_config_parafile(): BB_PG Reg Fail!!\n");
|
||||
goto phy_BB8190_Config_ParaFile_Fail;
|
||||
@ -1013,7 +1012,7 @@ static bool _rtl92s_phy_bb_config_parafile(struct ieee80211_hw *hw)
|
||||
/* 3. BB AGC table Initialization */
|
||||
rtstatus = _rtl92s_phy_config_bb(hw, BASEBAND_CONFIG_AGC_TAB);
|
||||
|
||||
if (rtstatus != true) {
|
||||
if (!rtstatus) {
|
||||
pr_err("%s(): AGC Table Fail\n", __func__);
|
||||
goto phy_BB8190_Config_ParaFile_Fail;
|
||||
}
|
||||
@ -1270,7 +1269,7 @@ void rtl92s_phy_set_txpower(struct ieee80211_hw *hw, u8 channel)
|
||||
/* [0]:RF-A, [1]:RF-B */
|
||||
u8 cckpowerlevel[2], ofdmpowerLevel[2];
|
||||
|
||||
if (rtlefuse->txpwr_fromeprom == false)
|
||||
if (!rtlefuse->txpwr_fromeprom)
|
||||
return;
|
||||
|
||||
/* Mainly we use RF-A Tx Power to write the Tx Power registers,
|
||||
@ -1621,7 +1620,7 @@ bool rtl92s_phy_set_fw_cmd(struct ieee80211_hw *hw, enum fwcmd_iotype fw_cmdio)
|
||||
break;
|
||||
case FW_CMD_HIGH_PWR_ENABLE:
|
||||
if (!(rtlpriv->dm.dm_flag & HAL_DM_HIPWR_DISABLE) &&
|
||||
(rtlpriv->dm.dynamic_txpower_enable != true)) {
|
||||
!rtlpriv->dm.dynamic_txpower_enable) {
|
||||
fw_cmdmap |= (FW_HIGH_PWR_ENABLE_CTL |
|
||||
FW_SS_CTL);
|
||||
FW_CMD_IO_SET(rtlpriv, fw_cmdmap);
|
||||
|
@ -499,7 +499,7 @@ bool rtl92s_phy_rf6052_config(struct ieee80211_hw *hw)
|
||||
break;
|
||||
}
|
||||
|
||||
if (rtstatus != true) {
|
||||
if (!rtstatus) {
|
||||
pr_err("Radio[%d] Fail!!\n", rfpath);
|
||||
goto fail;
|
||||
}
|
||||
|
Loading…
Reference in New Issue
Block a user