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net/mlx5e: Support XDP over Striding RQ
Add XDP support over Striding RQ. Now that linear SKB is supported over Striding RQ, we can support XDP by setting stride size to PAGE_SIZE and headroom to XDP_PACKET_HEADROOM. Upon a MPWQE free, do not release pages that are being XDP xmit, they will be released upon completions. Striding RQ is capable of a higher packet-rate than conventional RQ. A performance gain is expected for all cases that had a HW packet-rate bottleneck. This is the case whenever using many flows that distribute to many cores. Performance testing: ConnectX-5, 24 rings, default MTU. CQE compression ON (to reduce completions BW in PCI). XDP_DROP packet rate: -------------------------------------------------- | pkt size | XDP rate | 100GbE linerate | pct% | -------------------------------------------------- | 64byte | 126.2 Mpps | 148.0 Mpps | 85% | | 128byte | 80.0 Mpps | 84.8 Mpps | 94% | | 256byte | 42.7 Mpps | 42.7 Mpps | 100% | | 512byte | 23.4 Mpps | 23.4 Mpps | 100% | -------------------------------------------------- Signed-off-by: Tariq Toukan <tariqt@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
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@ -457,6 +457,7 @@ struct mlx5e_mpw_info {
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struct mlx5e_umr_dma_info umr;
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struct mlx5e_umr_dma_info umr;
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u16 consumed_strides;
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u16 consumed_strides;
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u16 skbs_frags[MLX5_MPWRQ_PAGES_PER_WQE];
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u16 skbs_frags[MLX5_MPWRQ_PAGES_PER_WQE];
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DECLARE_BITMAP(xdp_xmit_bitmap, MLX5_MPWRQ_PAGES_PER_WQE);
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};
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};
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/* a single cache unit is capable to serve one napi call (for non-striding rq)
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/* a single cache unit is capable to serve one napi call (for non-striding rq)
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@ -200,7 +200,8 @@ bool mlx5e_striding_rq_possible(struct mlx5_core_dev *mdev,
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struct mlx5e_params *params)
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struct mlx5e_params *params)
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{
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{
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return mlx5e_check_fragmented_striding_rq_cap(mdev) &&
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return mlx5e_check_fragmented_striding_rq_cap(mdev) &&
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!params->xdp_prog && !MLX5_IPSEC_DEV(mdev);
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!MLX5_IPSEC_DEV(mdev) &&
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!(params->xdp_prog && !mlx5e_rx_mpwqe_is_linear_skb(mdev, params));
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}
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}
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void mlx5e_set_rq_type(struct mlx5_core_dev *mdev, struct mlx5e_params *params)
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void mlx5e_set_rq_type(struct mlx5_core_dev *mdev, struct mlx5e_params *params)
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@ -349,13 +349,16 @@ mlx5e_copy_skb_header_mpwqe(struct device *pdev,
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void mlx5e_free_rx_mpwqe(struct mlx5e_rq *rq, struct mlx5e_mpw_info *wi)
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void mlx5e_free_rx_mpwqe(struct mlx5e_rq *rq, struct mlx5e_mpw_info *wi)
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{
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{
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const bool no_xdp_xmit =
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bitmap_empty(wi->xdp_xmit_bitmap, MLX5_MPWRQ_PAGES_PER_WQE);
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int pg_strides = mlx5e_mpwqe_strides_per_page(rq);
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int pg_strides = mlx5e_mpwqe_strides_per_page(rq);
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struct mlx5e_dma_info *dma_info = &wi->umr.dma_info[0];
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struct mlx5e_dma_info *dma_info = wi->umr.dma_info;
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int i;
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int i;
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for (i = 0; i < MLX5_MPWRQ_PAGES_PER_WQE; i++, dma_info++) {
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for (i = 0; i < MLX5_MPWRQ_PAGES_PER_WQE; i++) {
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page_ref_sub(dma_info->page, pg_strides - wi->skbs_frags[i]);
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page_ref_sub(dma_info[i].page, pg_strides - wi->skbs_frags[i]);
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mlx5e_page_release(rq, dma_info, true);
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if (no_xdp_xmit || !test_bit(i, wi->xdp_xmit_bitmap))
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mlx5e_page_release(rq, &dma_info[i], true);
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}
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}
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}
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}
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@ -404,6 +407,7 @@ static int mlx5e_alloc_rx_mpwqe(struct mlx5e_rq *rq, u16 ix)
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}
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}
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memset(wi->skbs_frags, 0, sizeof(*wi->skbs_frags) * MLX5_MPWRQ_PAGES_PER_WQE);
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memset(wi->skbs_frags, 0, sizeof(*wi->skbs_frags) * MLX5_MPWRQ_PAGES_PER_WQE);
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bitmap_zero(wi->xdp_xmit_bitmap, MLX5_MPWRQ_PAGES_PER_WQE);
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wi->consumed_strides = 0;
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wi->consumed_strides = 0;
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rq->mpwqe.umr_in_progress = true;
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rq->mpwqe.umr_in_progress = true;
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@ -1028,18 +1032,30 @@ mlx5e_skb_from_cqe_mpwrq_linear(struct mlx5e_rq *rq, struct mlx5e_mpw_info *wi,
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{
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{
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struct mlx5e_dma_info *di = &wi->umr.dma_info[page_idx];
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struct mlx5e_dma_info *di = &wi->umr.dma_info[page_idx];
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u16 rx_headroom = rq->buff.headroom;
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u16 rx_headroom = rq->buff.headroom;
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u32 cqe_bcnt32 = cqe_bcnt;
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struct sk_buff *skb;
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struct sk_buff *skb;
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void *va, *data;
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void *va, *data;
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u32 frag_size;
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u32 frag_size;
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bool consumed;
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va = page_address(di->page) + head_offset;
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va = page_address(di->page) + head_offset;
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data = va + rx_headroom;
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data = va + rx_headroom;
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frag_size = MLX5_SKB_FRAG_SZ(rx_headroom + cqe_bcnt);
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frag_size = MLX5_SKB_FRAG_SZ(rx_headroom + cqe_bcnt32);
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dma_sync_single_range_for_cpu(rq->pdev, di->addr, head_offset,
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dma_sync_single_range_for_cpu(rq->pdev, di->addr, head_offset,
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frag_size, DMA_FROM_DEVICE);
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frag_size, DMA_FROM_DEVICE);
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prefetch(data);
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prefetch(data);
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skb = mlx5e_build_linear_skb(rq, va, frag_size, rx_headroom, cqe_bcnt);
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rcu_read_lock();
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consumed = mlx5e_xdp_handle(rq, di, va, &rx_headroom, &cqe_bcnt32);
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rcu_read_unlock();
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if (consumed) {
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if (__test_and_clear_bit(MLX5E_RQ_FLAG_XDP_XMIT, rq->flags))
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__set_bit(page_idx, wi->xdp_xmit_bitmap); /* non-atomic */
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return NULL; /* page/packet was consumed by XDP */
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}
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skb = mlx5e_build_linear_skb(rq, va, frag_size, rx_headroom, cqe_bcnt32);
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if (unlikely(!skb))
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if (unlikely(!skb))
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return NULL;
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return NULL;
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@ -1078,7 +1094,7 @@ void mlx5e_handle_rx_cqe_mpwrq(struct mlx5e_rq *rq, struct mlx5_cqe64 *cqe)
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skb = rq->mpwqe.skb_from_cqe_mpwrq(rq, wi, cqe_bcnt, head_offset,
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skb = rq->mpwqe.skb_from_cqe_mpwrq(rq, wi, cqe_bcnt, head_offset,
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page_idx);
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page_idx);
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if (unlikely(!skb))
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if (!skb)
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goto mpwrq_cqe_out;
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goto mpwrq_cqe_out;
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mlx5e_complete_rx_cqe(rq, cqe, cqe_bcnt, skb);
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mlx5e_complete_rx_cqe(rq, cqe, cqe_bcnt, skb);
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