mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-26 22:30:54 +07:00
ARM: dts: enable clock binding on Hi3620
Enable clock binding for Hi3620 common clock driver. Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com> Signed-off-by: Kevin Hilman <khilman@linaro.org>
This commit is contained in:
Haojian Zhuang
Kevin Hilman
parent
22bae42904
commit
22e99a6d43
@ -11,7 +11,8 @@
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* publishhed by the Free Software Foundation.
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*/
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/include/ "skeleton.dtsi"
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#include "skeleton.dtsi"
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#include <dt-bindings/clock/hi3620-clock.h>
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/ {
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aliases {
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@ -63,6 +64,7 @@ cpu@3 {
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};
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amba {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "arm,amba-bus";
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@ -88,13 +90,20 @@ gic: interrupt-controller@1000 {
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sysctrl: system-controller@802000 {
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compatible = "hisilicon,sysctrl";
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reg = <0x802000 0x1000>;
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#address-cells = <1>;
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#size-cells = <0>;
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#size-cells = <1>;
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ranges = <0 0x802000 0x1000>;
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reg = <0x802000 0x1000>;
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smp-offset = <0x31c>;
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resume-offset = <0x308>;
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reboot-offset = <0x4>;
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clock: clock@0 {
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compatible = "hisilicon,hi3620-clock";
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reg = <0 0x10000>;
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#clock-cells = <1>;
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};
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};
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dual_timer0: dual_timer@800000 {
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@ -102,7 +111,7 @@ dual_timer0: dual_timer@800000 {
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reg = <0x800000 0x1000>;
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/* timer00 & timer01 */
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interrupts = <0 0 4>, <0 1 4>;
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clocks = <&pclk>;
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clocks = <&clock HI3620_TIMER0_MUX>, <&clock HI3620_TIMER1_MUX>;
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clock-names = "apb_pclk";
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status = "disabled";
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};
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@ -112,7 +121,7 @@ dual_timer1: dual_timer@801000 {
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reg = <0x801000 0x1000>;
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/* timer10 & timer11 */
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interrupts = <0 2 4>, <0 3 4>;
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clocks = <&pclk>;
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clocks = <&clock HI3620_TIMER2_MUX>, <&clock HI3620_TIMER3_MUX>;
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clock-names = "apb_pclk";
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status = "disabled";
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};
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@ -122,7 +131,7 @@ dual_timer2: dual_timer@a01000 {
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reg = <0xa01000 0x1000>;
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/* timer20 & timer21 */
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interrupts = <0 4 4>, <0 5 4>;
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clocks = <&pclk>;
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clocks = <&clock HI3620_TIMER4_MUX>, <&clock HI3620_TIMER5_MUX>;
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clock-names = "apb_pclk";
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status = "disabled";
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};
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@ -132,7 +141,7 @@ dual_timer3: dual_timer@a02000 {
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reg = <0xa02000 0x1000>;
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/* timer30 & timer31 */
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interrupts = <0 6 4>, <0 7 4>;
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clocks = <&pclk>;
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clocks = <&clock HI3620_TIMER6_MUX>, <&clock HI3620_TIMER7_MUX>;
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clock-names = "apb_pclk";
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status = "disabled";
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};
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@ -142,7 +151,7 @@ dual_timer4: dual_timer@a03000 {
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reg = <0xa03000 0x1000>;
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/* timer40 & timer41 */
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interrupts = <0 96 4>, <0 97 4>;
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clocks = <&pclk>;
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clocks = <&clock HI3620_TIMER8_MUX>, <&clock HI3620_TIMER9_MUX>;
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clock-names = "apb_pclk";
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status = "disabled";
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};
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@ -157,7 +166,7 @@ uart0: uart@b00000 {
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compatible = "arm,pl011", "arm,primecell";
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reg = <0xb00000 0x1000>;
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interrupts = <0 20 4>;
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clocks = <&pclk>;
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clocks = <&clock HI3620_UARTCLK0>;
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clock-names = "apb_pclk";
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status = "disabled";
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};
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@ -166,7 +175,7 @@ uart1: uart@b01000 {
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compatible = "arm,pl011", "arm,primecell";
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reg = <0xb01000 0x1000>;
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interrupts = <0 21 4>;
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clocks = <&pclk>;
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clocks = <&clock HI3620_UARTCLK1>;
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clock-names = "apb_pclk";
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status = "disabled";
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};
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@ -175,7 +184,7 @@ uart2: uart@b02000 {
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compatible = "arm,pl011", "arm,primecell";
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reg = <0xb02000 0x1000>;
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interrupts = <0 22 4>;
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clocks = <&pclk>;
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clocks = <&clock HI3620_UARTCLK2>;
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clock-names = "apb_pclk";
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status = "disabled";
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};
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@ -184,7 +193,7 @@ uart3: uart@b03000 {
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compatible = "arm,pl011", "arm,primecell";
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reg = <0xb03000 0x1000>;
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interrupts = <0 23 4>;
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clocks = <&pclk>;
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clocks = <&clock HI3620_UARTCLK3>;
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clock-names = "apb_pclk";
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status = "disabled";
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};
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@ -193,7 +202,7 @@ uart4: uart@b04000 {
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compatible = "arm,pl011", "arm,primecell";
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reg = <0xb04000 0x1000>;
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interrupts = <0 24 4>;
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clocks = <&pclk>;
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clocks = <&clock HI3620_UARTCLK4>;
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clock-names = "apb_pclk";
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status = "disabled";
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};
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@ -208,7 +217,7 @@ gpio0: gpio@806000 {
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&pmx0 5 0 1 &pmx0 6 1 1 &pmx0 7 2 1>;
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interrupt-controller;
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#interrupt-cells = <2>;
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clocks = <&pclk>;
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clocks = <&clock HI3620_GPIOCLK0>;
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clock-names = "apb_pclk";
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};
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@ -223,7 +232,7 @@ &pmx0 3 3 1 &pmx0 4 3 1 &pmx0 5 4 1
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&pmx0 6 5 1 &pmx0 7 6 1>;
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interrupt-controller;
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#interrupt-cells = <2>;
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clocks = <&pclk>;
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clocks = <&clock HI3620_GPIOCLK1>;
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clock-names = "apb_pclk";
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};
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@ -238,7 +247,7 @@ &pmx0 3 10 1 &pmx0 4 3 1 &pmx0 5 3 1
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&pmx0 6 3 1 &pmx0 7 3 1>;
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interrupt-controller;
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#interrupt-cells = <2>;
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clocks = <&pclk>;
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clocks = <&clock HI3620_GPIOCLK2>;
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clock-names = "apb_pclk";
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};
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@ -253,7 +262,7 @@ &pmx0 3 3 1 &pmx0 4 11 1 &pmx0 5 11 1
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&pmx0 6 11 1 &pmx0 7 11 1>;
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interrupt-controller;
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#interrupt-cells = <2>;
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clocks = <&pclk>;
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clocks = <&clock HI3620_GPIOCLK3>;
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clock-names = "apb_pclk";
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};
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@ -268,7 +277,7 @@ &pmx0 3 11 1 &pmx0 4 12 1 &pmx0 5 12 1
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&pmx0 6 13 1 &pmx0 7 13 1>;
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interrupt-controller;
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#interrupt-cells = <2>;
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clocks = <&pclk>;
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clocks = <&clock HI3620_GPIOCLK4>;
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clock-names = "apb_pclk";
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};
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@ -283,7 +292,7 @@ &pmx0 3 16 1 &pmx0 4 16 1 &pmx0 5 16 1
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&pmx0 6 16 1 &pmx0 7 16 1>;
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interrupt-controller;
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#interrupt-cells = <2>;
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clocks = <&pclk>;
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clocks = <&clock HI3620_GPIOCLK5>;
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clock-names = "apb_pclk";
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};
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@ -298,7 +307,7 @@ &pmx0 3 17 1 &pmx0 4 18 1 &pmx0 5 18 1
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&pmx0 6 18 1 &pmx0 7 19 1>;
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interrupt-controller;
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#interrupt-cells = <2>;
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clocks = <&pclk>;
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clocks = <&clock HI3620_GPIOCLK6>;
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clock-names = "apb_pclk";
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};
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@ -313,7 +322,7 @@ &pmx0 3 22 1 &pmx0 4 23 1 &pmx0 5 24 1
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&pmx0 6 25 1 &pmx0 7 26 1>;
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interrupt-controller;
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#interrupt-cells = <2>;
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clocks = <&pclk>;
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clocks = <&clock HI3620_GPIOCLK7>;
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clock-names = "apb_pclk";
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};
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@ -328,7 +337,7 @@ &pmx0 3 30 1 &pmx0 4 31 1 &pmx0 5 32 1
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&pmx0 6 33 1 &pmx0 7 34 1>;
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interrupt-controller;
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#interrupt-cells = <2>;
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clocks = <&pclk>;
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clocks = <&clock HI3620_GPIOCLK8>;
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clock-names = "apb_pclk";
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};
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@ -343,7 +352,7 @@ &pmx0 3 38 1 &pmx0 4 39 1 &pmx0 5 40 1
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&pmx0 6 41 1>;
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interrupt-controller;
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#interrupt-cells = <2>;
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clocks = <&pclk>;
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clocks = <&clock HI3620_GPIOCLK9>;
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clock-names = "apb_pclk";
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};
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@ -357,7 +366,7 @@ gpio10: gpio@810000 {
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&pmx0 5 45 1 &pmx0 6 46 1 &pmx0 7 46 1>;
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interrupt-controller;
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#interrupt-cells = <2>;
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clocks = <&pclk>;
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clocks = <&clock HI3620_GPIOCLK10>;
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clock-names = "apb_pclk";
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};
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@ -372,7 +381,7 @@ &pmx0 3 47 1 &pmx0 4 47 1 &pmx0 5 48 1
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&pmx0 6 49 1 &pmx0 7 49 1>;
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interrupt-controller;
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#interrupt-cells = <2>;
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clocks = <&pclk>;
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clocks = <&clock HI3620_GPIOCLK11>;
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clock-names = "apb_pclk";
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};
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@ -387,7 +396,7 @@ &pmx0 3 49 1 &pmx0 4 51 1 &pmx0 5 51 1
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&pmx0 6 51 1 &pmx0 7 52 1>;
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interrupt-controller;
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#interrupt-cells = <2>;
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clocks = <&pclk>;
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clocks = <&clock HI3620_GPIOCLK12>;
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clock-names = "apb_pclk";
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};
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@ -402,7 +411,7 @@ &pmx0 3 53 1 &pmx0 4 53 1 &pmx0 5 54 1
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&pmx0 6 55 1 &pmx0 7 56 1>;
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interrupt-controller;
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#interrupt-cells = <2>;
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clocks = <&pclk>;
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clocks = <&clock HI3620_GPIOCLK13>;
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clock-names = "apb_pclk";
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};
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@ -417,7 +426,7 @@ &pmx0 3 58 1 &pmx0 4 59 1 &pmx0 5 60 1
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&pmx0 6 60 1 &pmx0 7 61 1>;
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interrupt-controller;
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#interrupt-cells = <2>;
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clocks = <&pclk>;
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clocks = <&clock HI3620_GPIOCLK14>;
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clock-names = "apb_pclk";
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};
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@ -432,7 +441,7 @@ &pmx0 3 63 1 &pmx0 4 63 1 &pmx0 5 64 1
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&pmx0 6 64 1 &pmx0 7 65 1>;
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interrupt-controller;
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#interrupt-cells = <2>;
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clocks = <&pclk>;
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clocks = <&clock HI3620_GPIOCLK15>;
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clock-names = "apb_pclk";
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};
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@ -447,7 +456,7 @@ &pmx0 3 69 1 &pmx0 4 70 1 &pmx0 5 71 1
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&pmx0 6 72 1 &pmx0 7 73 1>;
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interrupt-controller;
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#interrupt-cells = <2>;
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clocks = <&pclk>;
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clocks = <&clock HI3620_GPIOCLK16>;
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clock-names = "apb_pclk";
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};
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@ -462,7 +471,7 @@ &pmx0 3 77 1 &pmx0 4 78 1 &pmx0 5 79 1
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&pmx0 6 80 1 &pmx0 7 81 1>;
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interrupt-controller;
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#interrupt-cells = <2>;
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clocks = <&pclk>;
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clocks = <&clock HI3620_GPIOCLK17>;
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clock-names = "apb_pclk";
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};
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@ -477,7 +486,7 @@ &pmx0 3 84 1 &pmx0 4 84 1 &pmx0 5 85 1
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&pmx0 6 86 1 &pmx0 7 87 1>;
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interrupt-controller;
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#interrupt-cells = <2>;
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clocks = <&pclk>;
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clocks = <&clock HI3620_GPIOCLK18>;
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clock-names = "apb_pclk";
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};
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@ -491,7 +500,7 @@ gpio19: gpio@819000 {
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&pmx0 3 88 1>;
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interrupt-controller;
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#interrupt-cells = <2>;
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clocks = <&pclk>;
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clocks = <&clock HI3620_GPIOCLK19>;
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clock-names = "apb_pclk";
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};
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@ -505,7 +514,7 @@ gpio20: gpio@81a000 {
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&pmx0 3 90 1 &pmx0 4 91 1 &pmx0 5 92 1>;
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interrupt-controller;
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#interrupt-cells = <2>;
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clocks = <&pclk>;
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clocks = <&clock HI3620_GPIOCLK20>;
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clock-names = "apb_pclk";
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};
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@ -518,7 +527,7 @@ gpio21: gpio@81b000 {
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gpio-ranges = < &pmx0 3 94 1 &pmx0 7 96 1>;
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interrupt-controller;
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#interrupt-cells = <2>;
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clocks = <&pclk>;
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clocks = <&clock HI3620_GPIOCLK21>;
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clock-names = "apb_pclk";
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};
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@ -8,7 +8,8 @@
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*/
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/dts-v1/;
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/include/ "hi3620.dtsi"
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#include "hi3620.dtsi"
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/ {
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model = "Hisilicon Hi4511 Development Board";
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