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phy: for 4.11-rc
*) Revert USB3 PHY support for Broadcom NSP SoC
*) Fix compiler error on qcom-usb-hs when depends on EXTCON
is not added
*) Fix error handling in phy-exynos-pcie
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
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Merge tag 'phy-for-4.11-rc' of git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy into usb-linus
Kishon writes:
phy: for 4.11-rc
*) Revert USB3 PHY support for Broadcom NSP SoC
*) Fix compiler error on qcom-usb-hs when depends on EXTCON
is not added
*) Fix error handling in phy-exynos-pcie
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
This commit is contained in:
Greg Kroah-Hartman
commit
22db87ba6b
@ -1,39 +0,0 @@
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Broadcom USB3 phy binding for northstar plus SoC
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The USB3 phy is internal to the SoC and is accessed using mdio interface.
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Required mdio bus properties:
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- reg: Should be 0x0 for SoC internal USB3 phy
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- #address-cells: must be 1
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- #size-cells: must be 0
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Required USB3 PHY properties:
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- compatible: should be "brcm,nsp-usb3-phy"
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- reg: USB3 Phy address on SoC internal MDIO bus and it should be 0x10.
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- usb3-ctrl-syscon: handler of syscon node defining physical address
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of usb3 control register.
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- #phy-cells: must be 0
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Required usb3 control properties:
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- compatible: should be "brcm,nsp-usb3-ctrl"
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- reg: offset and length of the control registers
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Example:
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mdio@0 {
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reg = <0x0>;
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#address-cells = <1>;
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#size-cells = <0>;
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usb3_phy: usb-phy@10 {
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compatible = "brcm,nsp-usb3-phy";
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reg = <0x10>;
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usb3-ctrl-syscon = <&usb3_ctrl>;
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#phy-cells = <0>;
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status = "disabled";
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};
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};
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usb3_ctrl: syscon@104408 {
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compatible = "brcm,nsp-usb3-ctrl", "syscon";
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reg = <0x104408 0x3fc>;
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};
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@ -449,6 +449,7 @@ config PHY_QCOM_UFS
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config PHY_QCOM_USB_HS
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tristate "Qualcomm USB HS PHY module"
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depends on USB_ULPI_BUS
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depends on EXTCON || !EXTCON # if EXTCON=m, this cannot be built-in
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select GENERIC_PHY
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help
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Support for the USB high-speed ULPI compliant phy on Qualcomm
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@ -510,12 +511,4 @@ config PHY_MESON8B_USB2
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and GXBB SoCs.
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If unsure, say N.
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config PHY_NSP_USB3
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tristate "Broadcom NorthStar plus USB3 PHY driver"
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depends on OF && (ARCH_BCM_NSP || COMPILE_TEST)
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select GENERIC_PHY
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default ARCH_BCM_NSP
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help
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Enable this to support the Broadcom Northstar plus USB3 PHY.
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If unsure, say N.
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endmenu
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@ -62,4 +62,3 @@ obj-$(CONFIG_PHY_CYGNUS_PCIE) += phy-bcm-cygnus-pcie.o
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obj-$(CONFIG_ARCH_TEGRA) += tegra/
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obj-$(CONFIG_PHY_NS2_PCIE) += phy-bcm-ns2-pcie.o
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obj-$(CONFIG_PHY_MESON8B_USB2) += phy-meson8b-usb2.o
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obj-$(CONFIG_PHY_NSP_USB3) += phy-bcm-nsp-usb3.o
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@ -1,177 +0,0 @@
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/*
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* Copyright (C) 2016 Broadcom
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation version 2.
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*
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* This program is distributed "as is" WITHOUT ANY WARRANTY of any
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* kind, whether express or implied; without even the implied warranty
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/delay.h>
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/mfd/syscon.h>
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#include <linux/mdio.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/phy/phy.h>
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#include <linux/regmap.h>
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#define NSP_USB3_RST_CTRL_OFFSET 0x3f8
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/* mdio reg access */
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#define NSP_USB3_PHY_BASE_ADDR_REG 0x1f
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#define NSP_USB3_PHY_PLL30_BLOCK 0x8000
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#define NSP_USB3_PLL_CONTROL 0x01
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#define NSP_USB3_PLLA_CONTROL0 0x0a
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#define NSP_USB3_PLLA_CONTROL1 0x0b
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#define NSP_USB3_PHY_TX_PMD_BLOCK 0x8040
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#define NSP_USB3_TX_PMD_CONTROL1 0x01
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#define NSP_USB3_PHY_PIPE_BLOCK 0x8060
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#define NSP_USB3_LFPS_CMP 0x02
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#define NSP_USB3_LFPS_DEGLITCH 0x03
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struct nsp_usb3_phy {
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struct regmap *usb3_ctrl;
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struct phy *phy;
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struct mdio_device *mdiodev;
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};
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static int nsp_usb3_phy_init(struct phy *phy)
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{
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struct nsp_usb3_phy *iphy = phy_get_drvdata(phy);
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struct mii_bus *bus = iphy->mdiodev->bus;
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int addr = iphy->mdiodev->addr;
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u32 data;
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int rc;
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rc = regmap_read(iphy->usb3_ctrl, 0, &data);
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if (rc)
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return rc;
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data |= 1;
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rc = regmap_write(iphy->usb3_ctrl, 0, data);
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if (rc)
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return rc;
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rc = regmap_write(iphy->usb3_ctrl, NSP_USB3_RST_CTRL_OFFSET, 1);
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if (rc)
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return rc;
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rc = mdiobus_write(bus, addr, NSP_USB3_PHY_BASE_ADDR_REG,
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NSP_USB3_PHY_PLL30_BLOCK);
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if (rc)
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return rc;
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rc = mdiobus_write(bus, addr, NSP_USB3_PLL_CONTROL, 0x1000);
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if (rc)
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return rc;
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rc = mdiobus_write(bus, addr, NSP_USB3_PLLA_CONTROL0, 0x6400);
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if (rc)
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return rc;
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rc = mdiobus_write(bus, addr, NSP_USB3_PLLA_CONTROL1, 0xc000);
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if (rc)
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return rc;
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rc = mdiobus_write(bus, addr, NSP_USB3_PLLA_CONTROL1, 0x8000);
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if (rc)
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return rc;
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rc = regmap_write(iphy->usb3_ctrl, NSP_USB3_RST_CTRL_OFFSET, 0);
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if (rc)
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return rc;
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rc = mdiobus_write(bus, addr, NSP_USB3_PLL_CONTROL, 0x9000);
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if (rc)
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return rc;
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rc = mdiobus_write(bus, addr, NSP_USB3_PHY_BASE_ADDR_REG,
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NSP_USB3_PHY_PIPE_BLOCK);
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if (rc)
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return rc;
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rc = mdiobus_write(bus, addr, NSP_USB3_LFPS_CMP, 0xf30d);
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if (rc)
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return rc;
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rc = mdiobus_write(bus, addr, NSP_USB3_LFPS_DEGLITCH, 0x6302);
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if (rc)
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return rc;
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rc = mdiobus_write(bus, addr, NSP_USB3_PHY_BASE_ADDR_REG,
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NSP_USB3_PHY_TX_PMD_BLOCK);
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if (rc)
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return rc;
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rc = mdiobus_write(bus, addr, NSP_USB3_TX_PMD_CONTROL1, 0x1003);
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return rc;
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}
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static struct phy_ops nsp_usb3_phy_ops = {
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.init = nsp_usb3_phy_init,
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.owner = THIS_MODULE,
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};
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static int nsp_usb3_phy_probe(struct mdio_device *mdiodev)
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{
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struct device *dev = &mdiodev->dev;
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struct phy_provider *provider;
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struct nsp_usb3_phy *iphy;
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iphy = devm_kzalloc(dev, sizeof(*iphy), GFP_KERNEL);
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if (!iphy)
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return -ENOMEM;
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iphy->mdiodev = mdiodev;
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iphy->usb3_ctrl = syscon_regmap_lookup_by_phandle(dev->of_node,
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"usb3-ctrl-syscon");
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if (IS_ERR(iphy->usb3_ctrl))
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return PTR_ERR(iphy->usb3_ctrl);
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iphy->phy = devm_phy_create(dev, dev->of_node, &nsp_usb3_phy_ops);
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if (IS_ERR(iphy->phy)) {
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dev_err(dev, "failed to create PHY\n");
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return PTR_ERR(iphy->phy);
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}
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phy_set_drvdata(iphy->phy, iphy);
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provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
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if (IS_ERR(provider)) {
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dev_err(dev, "could not register PHY provider\n");
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return PTR_ERR(provider);
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}
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return 0;
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}
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static const struct of_device_id nsp_usb3_phy_of_match[] = {
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{.compatible = "brcm,nsp-usb3-phy",},
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{ /* sentinel */ }
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};
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static struct mdio_driver nsp_usb3_phy_driver = {
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.mdiodrv = {
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.driver = {
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.name = "nsp-usb3-phy",
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.of_match_table = nsp_usb3_phy_of_match,
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},
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},
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.probe = nsp_usb3_phy_probe,
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};
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mdio_module_driver(nsp_usb3_phy_driver);
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MODULE_DESCRIPTION("Broadcom NSP USB3 PHY driver");
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MODULE_LICENSE("GPL v2");
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MODULE_AUTHOR("Yendapally Reddy Dhananjaya Reddy <yendapally.reddy@broadcom.com");
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@ -254,8 +254,8 @@ static int exynos_pcie_phy_probe(struct platform_device *pdev)
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res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
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exynos_phy->blk_base = devm_ioremap_resource(dev, res);
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if (IS_ERR(exynos_phy->phy_base))
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return PTR_ERR(exynos_phy->phy_base);
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if (IS_ERR(exynos_phy->blk_base))
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return PTR_ERR(exynos_phy->blk_base);
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exynos_phy->drv_data = drv_data;
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