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drm/i915: Move num_plane to the intel_device_info structure
And rename it to num_sprites as this value doesn't count the primary plane. This limit lives with num_pipes really, and now that dev_priv->info is writable we can put it there instead. While at it, introduce a intel_device_info_runtime_init() where we'll be able to gather the device info fields at run-time. v2: rename num_plane to num_sprites (Ville Syrjälä) v3: rebase on top of latest drm-nightly Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com> (for v2) Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> (for v2) Signed-off-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -1459,6 +1459,25 @@ static void i915_dump_device_info(struct drm_i915_private *dev_priv)
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#undef SEP_COMMA
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}
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/*
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* Determine various intel_device_info fields at runtime.
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*
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* Use it when either:
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* - it's judged too laborious to fill n static structures with the limit
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* when a simple if statement does the job,
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* - run-time checks (eg read fuse/strap registers) are needed.
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*/
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static void intel_device_info_runtime_init(struct drm_device *dev)
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{
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struct intel_device_info *info;
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info = (struct intel_device_info *)&to_i915(dev)->info;
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info->num_sprites = 1;
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if (IS_VALLEYVIEW(dev))
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info->num_sprites = 2;
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}
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/**
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* i915_driver_load - setup chip and create an initial config
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* @dev: DRM device
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@ -1638,9 +1657,7 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
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if (!IS_I945G(dev) && !IS_I945GM(dev))
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pci_enable_msi(dev->pdev);
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dev_priv->num_plane = 1;
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if (IS_VALLEYVIEW(dev))
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dev_priv->num_plane = 2;
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intel_device_info_runtime_init(dev);
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if (INTEL_INFO(dev)->num_pipes) {
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ret = drm_vblank_init(dev, INTEL_INFO(dev)->num_pipes);
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@ -79,7 +79,7 @@ enum plane {
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};
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#define plane_name(p) ((p) + 'A')
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#define sprite_name(p, s) ((p) * dev_priv->num_plane + (s) + 'A')
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#define sprite_name(p, s) ((p) * INTEL_INFO(dev)->num_sprites + (s) + 'A')
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enum port {
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PORT_A = 0,
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@ -530,6 +530,7 @@ struct intel_uncore {
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struct intel_device_info {
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u32 display_mmio_offset;
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u8 num_pipes:3;
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u8 num_sprites:2;
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u8 gen;
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u8 ring_mask; /* Rings supported by the HW */
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DEV_INFO_FOR_EACH_FLAG(DEFINE_FLAG, SEP_SEMICOLON);
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@ -1450,8 +1451,6 @@ typedef struct drm_i915_private {
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u32 hpd_event_bits;
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struct timer_list hotplug_reenable_timer;
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int num_plane;
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struct i915_fbc fbc;
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struct intel_opregion opregion;
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struct intel_vbt_data vbt;
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@ -1189,7 +1189,7 @@ static void assert_sprites_disabled(struct drm_i915_private *dev_priv,
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u32 val;
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if (IS_VALLEYVIEW(dev)) {
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for (i = 0; i < dev_priv->num_plane; i++) {
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for (i = 0; i < INTEL_INFO(dev)->num_sprites; i++) {
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reg = SPCNTR(pipe, i);
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val = I915_READ(reg);
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WARN((val & SP_ENABLE),
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@ -11038,7 +11038,7 @@ void intel_modeset_init(struct drm_device *dev)
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for_each_pipe(i) {
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intel_crtc_init(dev, i);
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for (j = 0; j < dev_priv->num_plane; j++) {
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for (j = 0; j < INTEL_INFO(dev)->num_sprites; j++) {
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ret = intel_plane_init(dev, i, j);
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if (ret)
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DRM_DEBUG_KMS("pipe %c sprite %c init failed: %d\n",
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